How to improve the accuracy of ADC?

ADC : Analog Digital Converter, refers to analog-to-digital conversion, that is, (voltage) analog to digital conversion.

ADC modules are integrated in most MCUs, and ADC is also a module with a high usage rate in product development. I believe most people have used the function of ADC.

Built-in up to four advanced 12-bit ADC controllers (ADC1, 2, 3, 4) in STM32. Of course, the number of ADC controllers depends on the STM32 model, and some STM32s have 16-bit sampling ADCs (such as STM32F373). They provide a self-calibration feature for improving ADC accuracy as environmental conditions change.

We usually do not have very high requirements in using ADC, and it may not depend on whether the value converted by ADC is accurate. However, some specific occasions require more accurate conversion values, then we need to know more about ADC. The following chapters guide you to understand the relevant content.

ADC Error
In applications involving analog-to-digital conversion, ADC accuracy affects overall system quality and efficiency. To improve this accuracy, it is necessary to understand the errors associated with the ADC.

ADC errors mainly include: errors caused by the ADC itself and the environment .

1. The error caused by the ADC itself

Before talking about the error, let's talk about the ADC accuracy. For reference, the accuracy error is expressed as a multiple of 1 LSB:

$$1LSB=VREF+/2^{1}2.$$
A. Offset error

Offset error is the deviation between the first actual conversion and the first ideal conversion. The first transition occurs when the digital ADC output changes from 0 to 1. Ideally, the digital output should be 1 when the analog input is between 0.5 LSB and 1.5 LSB.

Still ideally, the first transition happens at 0.5 LSB. Denote offset error by EO. Offset error can be easily calibrated by application firmware.

Representation of positive offset error:

Representation of negative offset error:

B. Gain Error

Gain error is the deviation between the last actual transition and the last ideal transition. Gain error is represented by EG.

Representation of positive gain error:

Representation of negative gain error:

C. Differential Linearity Error
Differential Linearity Error (DLE) is the maximum deviation between the actual step and the ideal step. The "ideal situation" here does not refer to the ideal transfer curve, but to the ADC resolution.

Ideally, a 1 LSB change in analog input voltage should result in a digital code change. If an analog input voltage greater than 1 LSB is required to cause a digital code change, a differential linearity error will be observed. Therefore, DLE corresponds to the maximum additional voltage required to change from one digital code to the next.

D. Integral linearity error

Integral linearity error is the maximum deviation between any actual transformation and the line associated with the endpoints, denoted ILE by EL.

The endpoint correlation line can be defined as the line connecting the first actual conversion to the last actual conversion on the A/D transfer curve. EL refers to the deviation from this line for each transition. Therefore, the endpoint correlation line corresponds to the actual transmission curve and is not correlated with the ideal transmission curve.

E. Total Unadjusted Error

Total Unadjusted Error (TUE) is the maximum deviation between the actual and ideal transfer curve. This parameter specifies the total error that can occur that would cause the maximum deviation between the ideal and actual digital output. TUE is the maximum recorded deviation between the ideal expected value for any input voltage and the actual value obtained from the ADC.

2. Error caused by ADC environment

A. Reference Voltage Noise

Since the ADC output is the ratio of the analog signal voltage to the reference voltage, any noise on the analog reference will cause a change in the converted digital value. In some packages, the VDDA analog supply is used as the reference voltage (VREF+), so the quality of the VDDA supply can affect the ADC error.

B. Reference Voltage/Power Supply Regulation

Power supply regulation is important to ADC accuracy because the conversion result is the ratio of the analog input voltage to the VREF+ value.

When connected to VDDA or VREF+, if the load on these inputs and their output impedance causes the output of the power supply to drop, errors will be introduced in the conversion results.

C. External reference voltage parameters

When using an external reference voltage source (on the VREF+ pin), this external reference source has some important parameters. Three reference voltage specifications must be considered: temperature drift, voltage noise, and long-term stability.

D. Analog input signal noise

Small, high-frequency signal changes can cause large conversion errors during the sampling time. This noise is generated by electrical equipment such as motors, engine ignition, power lines. It adds unwanted signals and therefore affects the source signal (such as a sensor). As a result, the ADC conversion result is inaccurate.

E. Poor match of ADC dynamic range for maximum input signal amplitude

For the highest ADC conversion accuracy, the ADC dynamic range must match the maximum amplitude of the signal to be converted.

We assume that the signal to be converted varies between 0 V and 2.5 V, and VREF+ is equal to 3.3 V. As shown in the figure below, some unused ADC conversion ranges will also reduce the accuracy of the converted signal.

How to improve the accuracy of ADC acquisition data?

1. Reduce the impact of ADC-related errors

The "ADC self-induced error" is described above, and the offset error and gain error can be easily compensated using the STM32 ADC self-calibration function or through the microcontroller firmware.

ADC_StartCalibration(ADC1);

2. Minimize external environmental errors

A. Reference voltage/supply noise minimization

That is, connect an external decoupling capacitor to the VREF and VDDA pins.

B. Analog Input Signal Noise Elimination

By adding an external RC filter to remove high frequencies.

C. Match the ADC dynamic range to the maximum signal amplitude

That is to match the reference voltage range to the sampling voltage (of course, a chip with a reference voltage pin is required).

Also, an amplifier can be used to scale the input signal range for the ADC range:

D. Compensation for temperature effects

The first approach is to fully characterize the offset and gain-drift and provide a look-up table in memory to correct the measurements for temperature changes. This calibration method requires additional cost and time.

The second method involves using an internal temperature sensor and an ADC watchdog to recalibrate the ADC when the temperature changes to a given value.

E. Optimize PCB layout

• Separate analog and digital layout

• Isolated Analog and Digital Circuit Power

• Use separate PCB layers for power and ground

3. Software methods to improve accuracy

A. Average sampling

Averaging reduces speed but improves accuracy

B. Digital filtering (suppression of 50/60 Hz noise in DC values)

• Set an appropriate sampling frequency (triggering from a timer is useful in this case).

· Perform software post-processing on the sampled data (e.g. combined filtering for 50 Hz noise and its harmonic suppression).

C. Fast Fourier Transform (FFT) of AC Measurements

·This method can display the harmonic part in the signal under test.

・Slower due to the use of more computing power.

D.ADC Calibration: Offset, Gain, Bit Weight Calibration

· ADC calibration can reduce internal ADC errors. However, the internal ADC structure must be known.

E. Minimize internal noise generated by the CPU

Application design must ensure that

· The interference from the microcontroller during ADC conversion is as small as possible.

• Minimize the amount of digital signal change during sampling and conversion (digital silence).

Reference article: https://blog.csdn.net/DP29syM41zyGndVF/article/details/86587115