FPGA IP软核之Microblaze_SPI接口（AD9833）

由于要使用IP软核Microblaze的SPI接口驱动DDS芯片AD9833，系统自带SPI接口程序实在太乱了，使用的AX309开发板，开发板例程SPI接口是FLASH读写，改起来也很费劲，所以干脆自己根据Microblaze手册编写SPI驱动。

 

 

 程序为SPI连接两个AD9833芯片，通过Microblaze中的SPI从设备寄存器SPISSR设置从设备。程序如下图：

#include "xspi.h"
#include "xspi_l.h"
#include "ad9833.h"
#include "xparameters.h"
#include "xgpio.h"


#define  Triangle_Wave  0x0002
#define  Sin_Wave       0x0000
#define  MSB_Wave       0x0028
#define  MSB_Wave_Half  0x0020
#define AD9833_freq_k 10.73741824f

void ad9833_init (void)
{
    XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_CR_OFFSET,  XSP_CR_ENABLE_MASK |XSP_CR_MASTER_MODE_MASK        |XSP_CR_CLK_POLARITY_MASK);
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000002);
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x0100);     //复位
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2100);  //B28、RESET为1，FSELECT =0；PSELECT =0；
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000);     // 频率寄存器低14位
      XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000);     //频率寄存器高14位
      XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0xC000);     //相位
      XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000);

     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000001);

     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x0100);     //复位
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2100);     //B28、RESET 为1，FSELECT =0；PSELECT =0；
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000);     // 频率寄存器低14位
      XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x4000);     //频率寄存器高14位
      XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0xC000);     //相位
      XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000);

}

void ad9833_FreqSet(u32 freq)     // HZ
{
     u16 Freq_L = 0;
     u16 Freq_H = 0;    //正弦频率
     float temp =0.0;
     u32 freq_str =0;

     u16 Freq_Tri_L = 0;
     u16 Freq_Tri_H = 0;  //触发信号频率
     u32 Freq_Tri_str =0;
     temp = freq * AD9833_freq_k;
     freq_str =(u32)temp;
     freq_str = freq_str << 2;
     Freq_L = (u16)(freq_str & 0xFFFF);
     Freq_L =      Freq_L >>2;
     Freq_L = Freq_L & 0x3FFF;
     Freq_L = Freq_L | 0x4000;

     Freq_H = (u16)((freq_str & 0xFFFF0000) >>16);
     Freq_H = Freq_H & 0x3FFF;
     Freq_H = Freq_H | 0x4000;

///////////////////////////////////////////////////
     Freq_Tri_str = freq_str <<4;
     Freq_Tri_L = (u16)(Freq_Tri_str & 0xFFFF);
     Freq_Tri_L =      Freq_Tri_L >>2;
     Freq_Tri_L = Freq_Tri_L & 0x3FFF;
     Freq_Tri_L = Freq_Tri_L | 0x4000;

     Freq_Tri_H = (u16)((Freq_Tri_str & 0xFFFF0000) >>16);
     Freq_Tri_H = Freq_Tri_H & 0x3FFF;
     Freq_Tri_H = Freq_Tri_H | 0x4000;

     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000002);
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000  |Sin_Wave);     //B28、RESET 为1，FSELECT =0；PSELECT =0；
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_L);                // 频率寄存器低14位
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_H);                // 频率寄存器高14位
     delay(1);
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_SSR_OFFSET, 0X00000001);
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, 0x2000  |MSB_Wave);     //B28、RESET 为1，FSELECT =0；PSELECT =0；
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_Tri_L);                // 频率寄存器低14位
     XSpi_WriteReg(XPAR_SPI_0_BASEADDR, XSP_DTR_OFFSET, Freq_Tri_H);                // 频率寄存器高14位
}