echo c > /proc/sysrq-trigger
ps看进程
root@sabresd_6dq:/ # ps
USER PID PPID VSIZE RSS WCHAN PC NAME
root 1 0 592 416 c01406bc 0001a068 S /init
root 2 0 0 0 c00ad130 00000000 S kthreadd
root 3 2 0 0 c0094f28 00000000 S ksoftirqd/0
root 5 2 0 0 c00a8d24 00000000 S kworker/u:0
root 6 2 0 0 c00d1f44 00000000 S migration/0
root 7 2 0 0 c00d26e0 00000000 S watchdog/0
root 8 2 0 0 c00d1f44 00000000 S migration/1
这个进程和之前海思的进程不同，这个进程其实是个应用程序，源文件在安卓目录 /system/core/init/watchdogd.c,这里一直在喂狗
然后看到这个进程去open watchdog节点，而驱动里的open就是在喂狗，停止喂狗以后，系统卡死，但是没有重启，遇到和海思一样的情况
而且由于这句log：Fixing recursive fault but reboot is needed!所以哪怕启动过程中死机后重启也未必是watchdog的重启。
忽然想到由于pmic需要i2c去配，所以如果i2c有问题的话，这个设置也会出错，导致无法重启
看看wdog_b这个pin的定义，在
board-mx6q_sabresd.c中初始化pin的时候
if (cpu_is_mx6q()) {
mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_pads,
ARRAY_SIZE(mx6q_sabresd_pads));
在board-mx6q_sabresd.h里
MX6Q_PAD_GPIO_1__WDOG2_WDOG_B,
这里把gpio1_1设置成了wdog2的wdog_b这个功能，在spec的2105页
spec316页看起来似乎wdog1的wdog_b这个功能需要gpio1—9
p209页居然有 Two Watchdog timers (WDOG)
在board-mx6q_sabrelite.c里
imx6q_add_imx2_wdt(0, NULL);
在platform-imx2-wdt.c里
struct platform_device *__init imx_add_imx2_wdt(
const struct imx_imx2_wdt_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("imx2-wdt", data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
#ifdef CONFIG_SOC_IMX6Q
const struct imx_imx2_wdt_data imx6q_imx2_wdt_data[] __initconst = {
#define imx6q_imx2_wdt_data_entry(_id, _hwid) \
imx_imx2_wdt_data_entry(MX6Q, _id, _hwid, SZ_16K)
imx6q_imx2_wdt_data_entry(0, 1),
imx6q_imx2_wdt_data_entry(1, 2),
};
#endif
POR_B这个管脚的状态由三个变量决定
一个是pmic的resetmcu
一个是jatag上的管脚
一个是wdog_B决定
任何一个为低就都低了，
而如果源码对pmic有过配置的话，ic的地址不是10就是04，但是名字都对不上
spec 5759页
Power-Down Counter Event：
This counter has
a fixed time-out value of 16 seconds, after which it will drive the WDOG-1 signal low
整个原理图上的机制是wdog_B输出低电平然后通过por_b回到主ic的por pin完成reset，而这个wdog_B是wdog_rst这个信号
最后发现我们的板子和开发板其实接线是不同的，我们的就是上面说的机制，但是开发板wdog_B出来的是PWRON，这个PWRON连到了pmic的PWRON，
而pmic的RESETMCU连到了ic的pro pin
spec 587页
TrustZone (TZ) Architecture in the ARM Cortex A9 Platform, TrustZone aware
Interrupt Controller (GIC) and TrustZone Watchdog Timer (WDOG-2)
这么看来watchdog2是用给tz的，也就是tz这个小内核gg的时候才reset
finite state machine (FSM).
如果把watchdog初始化成2，连reboot命令都执行不下去了，会卡死，而reboot先到
/kernel/sys.c中
void kernel_restart(char *cmd)
{
kernel_restart_prepare(cmd);
if (!cmd)
printk(KERN_EMERG "Restarting system.\n");
else
printk(KERN_EMERG "Restarting system with command '%s'.\n", cmd);
kmsg_dump(KMSG_DUMP_RESTART);
machine_restart(cmd);
}
spec:1042页
WDOG-1 can by disabled by WDOG_EN bit in the WCR.
spec:5075页
wdog_rst_b
This reset will not be generated if
mask_wdog_rst bits are coded to 5
spec5096页
bit 10-7 这个默认是no mask的
spec 5099页的寄存器表明reset是由什么产生的
spec5077页说了一下warm reset不生效的情况
However, the implication here is that a valid warm reset source condition will not be able
to cause a chip reset until the SDRAMC sends the acknowledge signal (emi_dvfs_ack).
spec5079页
For example, a WDOG reset event has
occurred but the WDOG reset will not be serviced until the emi_dvfs_ack signal is
received. So, essentially all WARM reset sources depend on the EMI providing the
emi_dvfs_ack acknowledge signal before the reset is performed. When the EMI is not
ps看进程
root@sabresd_6dq:/ # ps
USER PID PPID VSIZE RSS WCHAN PC NAME
root 1 0 592 416 c01406bc 0001a068 S /init
root 2 0 0 0 c00ad130 00000000 S kthreadd
root 3 2 0 0 c0094f28 00000000 S ksoftirqd/0
root 5 2 0 0 c00a8d24 00000000 S kworker/u:0
root 6 2 0 0 c00d1f44 00000000 S migration/0
root 7 2 0 0 c00d26e0 00000000 S watchdog/0
root 8 2 0 0 c00d1f44 00000000 S migration/1
这个进程和之前海思的进程不同，这个进程其实是个应用程序，源文件在安卓目录 /system/core/init/watchdogd.c,这里一直在喂狗
然后看到这个进程去open watchdog节点，而驱动里的open就是在喂狗，停止喂狗以后，系统卡死，但是没有重启，遇到和海思一样的情况
而且由于这句log：Fixing recursive fault but reboot is needed!所以哪怕启动过程中死机后重启也未必是watchdog的重启。
忽然想到由于pmic需要i2c去配，所以如果i2c有问题的话，这个设置也会出错，导致无法重启
看看wdog_b这个pin的定义，在
board-mx6q_sabresd.c中初始化pin的时候
if (cpu_is_mx6q()) {
mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_pads,
ARRAY_SIZE(mx6q_sabresd_pads));
在board-mx6q_sabresd.h里
MX6Q_PAD_GPIO_1__WDOG2_WDOG_B,
这里把gpio1_1设置成了wdog2的wdog_b这个功能，在spec的2105页
spec316页看起来似乎wdog1的wdog_b这个功能需要gpio1—9
p209页居然有 Two Watchdog timers (WDOG)
在board-mx6q_sabrelite.c里
imx6q_add_imx2_wdt(0, NULL);
在platform-imx2-wdt.c里
struct platform_device *__init imx_add_imx2_wdt(
const struct imx_imx2_wdt_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("imx2-wdt", data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
#ifdef CONFIG_SOC_IMX6Q
const struct imx_imx2_wdt_data imx6q_imx2_wdt_data[] __initconst = {
#define imx6q_imx2_wdt_data_entry(_id, _hwid) \
imx_imx2_wdt_data_entry(MX6Q, _id, _hwid, SZ_16K)
imx6q_imx2_wdt_data_entry(0, 1),
imx6q_imx2_wdt_data_entry(1, 2),
};
#endif
POR_B这个管脚的状态由三个变量决定
一个是pmic的resetmcu
一个是jatag上的管脚
一个是wdog_B决定
任何一个为低就都低了，
而如果源码对pmic有过配置的话，ic的地址不是10就是04，但是名字都对不上
spec 5759页
Power-Down Counter Event：
This counter has
a fixed time-out value of 16 seconds, after which it will drive the WDOG-1 signal low
整个原理图上的机制是wdog_B输出低电平然后通过por_b回到主ic的por pin完成reset，而这个wdog_B是wdog_rst这个信号
最后发现我们的板子和开发板其实接线是不同的，我们的就是上面说的机制，但是开发板wdog_B出来的是PWRON，这个PWRON连到了pmic的PWRON，
而pmic的RESETMCU连到了ic的pro pin
spec 587页
TrustZone (TZ) Architecture in the ARM Cortex A9 Platform, TrustZone aware
Interrupt Controller (GIC) and TrustZone Watchdog Timer (WDOG-2)
这么看来watchdog2是用给tz的，也就是tz这个小内核gg的时候才reset
finite state machine (FSM).
如果把watchdog初始化成2，连reboot命令都执行不下去了，会卡死，而reboot先到
/kernel/sys.c中
void kernel_restart(char *cmd)
{
kernel_restart_prepare(cmd);
if (!cmd)
printk(KERN_EMERG "Restarting system.\n");
else
printk(KERN_EMERG "Restarting system with command '%s'.\n", cmd);
kmsg_dump(KMSG_DUMP_RESTART);
machine_restart(cmd);
}
spec:1042页
WDOG-1 can by disabled by WDOG_EN bit in the WCR.
spec:5075页
wdog_rst_b
This reset will not be generated if
mask_wdog_rst bits are coded to 5
spec5096页
bit 10-7 这个默认是no mask的
spec 5099页的寄存器表明reset是由什么产生的
spec5077页说了一下warm reset不生效的情况
However, the implication here is that a valid warm reset source condition will not be able
to cause a chip reset until the SDRAMC sends the acknowledge signal (emi_dvfs_ack).
spec5079页
For example, a WDOG reset event has
occurred but the WDOG reset will not be serviced until the emi_dvfs_ack signal is
received. So, essentially all WARM reset sources depend on the EMI providing the
emi_dvfs_ack acknowledge signal before the reset is performed. When the EMI is not
used, emi_dvfs_ack is defaulted high.
最后配置如下，在setup里
val |= IMX2_WDT_WCR_WRE;
val |= (1 << 4);这样就可以了，读Watchdog Reset Status Register 可以判断本次重启的原因到底是不是watchdog