【zephyr】 i.MX RT MPU config

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MPU配置

// \arch\arm\soc\nxp_imx\rt\arm_mpu_regions.c

#define PERIPH_BASE	0x40000000
#define PPB_BASE	0xE0000000

static struct arm_mpu_region mpu_regions[] = {
	/* Region 0 */
	MPU_REGION_ENTRY("FLASH_0",
			 CONFIG_FLASH_BASE_ADDRESS,
			 REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
	/* Region 1 */
	MPU_REGION_ENTRY("SRAM_0",
			 CONFIG_SRAM_BASE_ADDRESS,
			 REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
};

struct arm_mpu_config mpu_config = {
	.num_regions = ARRAY_SIZE(mpu_regions),
	.mpu_regions = mpu_regions,
};

配置 ITCM

1. CONFIG_CODE_ITCM=y

/* itcm@0 */
#define CONFIG_FLASH_BASE_ADDRESS    0x0
#define CONFIG_FLASH_LOAD_OFFSET    0
#define CONFIG_FLASH_LOAD_SIZE        0
#define CONFIG_FLASH_SIZE        128

/* dtcm@20000000 */
#define CONFIG_SRAM_BASE_ADDRESS    0x20000000
#define CONFIG_SRAM_SIZE        128

/* itcm@0 */
#define CONFIG_FLASH_BASE_ADDRESS    0x0
#define CONFIG_FLASH_LOAD_OFFSET    0
#define CONFIG_FLASH_LOAD_SIZE        0
#define CONFIG_FLASH_SIZE        128

    2. 配置QSPI

/* ccm@400fc000 */
#define NXP_IMX_CCM_400FC000_BASE_ADDRESS	0x400fc000
#define NXP_IMX_CCM_400FC000_LABEL		"CCM"
#define NXP_IMX_CCM_400FC000_SIZE		16384

/* dtcm@20000000 */
#define CONFIG_SRAM_BASE_ADDRESS	0x20000000
#define CONFIG_SRAM_SIZE		128

/* flexspi0@402a8000 */
#define NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS		0x402a8000
#define NXP_IMX_FLEXSPI_402A8000_IRQ_0			108
#define NXP_IMX_FLEXSPI_402A8000_IRQ_0_PRIORITY		0
#define NXP_IMX_FLEXSPI_402A8000_LABEL			"FLEXSPI0"
#define NXP_IMX_FLEXSPI_402A8000_SIZE			16384

/* qspi@0 */
#define CONFIG_FLASH_BASE_ADDRESS		0x60000000
#define CONFIG_FLASH_LOAD_OFFSET		0
#define CONFIG_FLASH_LOAD_SIZE			0
#define CONFIG_FLASH_SIZE			8192
#define NXP_IMX_FLEXSPI_0_BASE_ADDRESS		0x60000000
#define NXP_IMX_FLEXSPI_0_SIZE			8388608

3. 函数调用关系

// \arch\arm\core\cortex_m\mpu\nxp_mpu.c
/**
 * This internal function is utilized by the MPU driver to parse the intent
 * type (i.e. THREAD_STACK_REGION) and return the correct region index.
 */
static inline u32_t _get_region_index_by_type(u32_t type)
{
	u32_t region_index;

	__ASSERT(type < THREAD_MPU_REGION_LAST,
		 "unsupported region type");


	region_index = mpu_config.num_regions + type;

	__ASSERT(region_index < _get_num_usable_regions(),
		 "out of MPU regions, requested %u max is %u",
		 region_index, _get_num_usable_regions() - 1);

	return region_index;
}

/* NXP MPU Driver Initial Setup */

/*
 * @brief MPU default configuration
 *
 * This function provides the default configuration mechanism for the Memory
 * Protection Unit (MPU).
 */
static void _nxp_mpu_config(void)
{
	u32_t r_index;

	__ASSERT(mpu_config.num_regions <= _get_num_regions(),
		 "too many static MPU regions defined");
	SYS_LOG_DBG("total region count: %d", _get_num_regions());

	/* Disable MPU */
	SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK;
	/* Clear Interrupts */
	SYSMPU->CESR |=  SYSMPU_CESR_SPERR_MASK;

	/* MPU Configuration */

	/* Configure regions */
	for (r_index = 0; r_index < mpu_config.num_regions; r_index++) {
		_region_init(r_index,
			     mpu_config.mpu_regions[r_index].base,
			     mpu_config.mpu_regions[r_index].end,
			     mpu_config.mpu_regions[r_index].attr);
	}

	/* Enable MPU */
	SYSMPU->CESR |= SYSMPU_CESR_VLD_MASK;

	nxp_mpu_enabled = 1;

#if defined(CONFIG_APPLICATION_MEMORY)
	u32_t index, region_attr, base, size;

	/* configure app data portion */

	/* set up app data region if exists, otherwise disable */
	if (size > 0) {
		_region_init(index, base, ENDADDR_ROUND(base + size),
			     region_attr);
	} else {
		SYSMPU->WORD[index][3] = 0;
	}
#endif
	/* Make sure that all the registers are set before proceeding */
	__DSB();
	__ISB();
}

编译出错调用关系：