content:
- design of FSM
- design of HLSM-D
- trifle
1. steps used to design FSM:
- assume an initial state S0.
- list all of the possible states by changing the input's value
- do the last step for every state. we can get a tree diagram
- merge the states which are equivalent.
2. HLSM-D combines datapath and control logic
datapath is used to deal with data. we can use some simple logic to deal with every step in need. and put these simple logic unit together to finish the task.
control logic is used to tell datapath logic when to do these steps. The main idea of this part is taking control of the behavior of register which is used to store the data.
3. assuming m is a std_logic_vector(0 to 2)
n0~2 are std_logic
m<=n0 & n1 & n2 is legal.
