.ack = maximasp_gpio_ack_irq,
.mask = maximasp_gpio_mask_irq,
.unmask = maximasp_gpio_unmask_irq,
.set_type = maximasp_gpio_irq_type,
.set_wake = maximasp_gpio_set_wake,
};
/arch/arm/mach-maximasp/include/irqs.h定义了本型号cpu的中断号及gpio中断寄存器标识：
/*
* IRQ numbers for interrupt handler
*/
#define INT_PFW 0 /* Power Fail Warning */
#define INT_WDT 1 /* Watchdog */
#define INT_USB0 2 /* USB0 (Host) */
#define INT_USB1 3 /* USB1 (Device) */
/* 4 (reserved) */
/* 5 (reserved) */
#define INT_RTC 6 /* Realtime clock */
#define INT_TRNG 7 /* Random number generator */
#define INT_TMR0 8 /* Timer 0 */
#define INT_TMR1 9 /* Timer 1 */
#define INT_TMR2 10 /* Timer 2 */
#define INT_SC0 11 /* Smartcard 0 */
#define INT_SC1 12 /* Smartcard 1 */
#define INT_MLCD 13 /* Mono LCD */
#define INT_I2C 14 /* I2C */
#define INT_CLCD 15 /* Color LCD (TFT) */
#define INT_UART0 16 /* UART 0 */
#define INT_UART1 17 /* UART 1 */
#define INT_UART2 18 /* UART 2 */
#define INT_SPI0 19 /* SPI 0 */
#define INT_SPI1 20 /* SPI 1 */
#define INT_SPI2 21 /* SPI 2 */
#define INT_SPI3 22 /* SPI 3 */
#define INT_SPI4 23 /* SPI 4 */
#define INT_KBD 24 /* Keyboard */
#define INT_TPRTR 25 /* Thermal printer */
#define INT_SDC 26 /* SDC */
#define INT_EMAC 27 /* Ethernet MAC */
#define INT_ADC 28 /* ADC */
#define INT_UCI0 29 /* UCI 0 */
#define INT_UCI1 30 /* UCI 1 */
/* 31 (reserved) */
/*
* NOTE! if GPIO IRQ order changes, update
* maximasp_gpio_demux_handler to compensate
*/
#define INT_GPIO0 32 /* GPIO 0 */
#define INT_GPIO1 33 /* GPIO 1 */
#define INT_GPIO2 34 /* GPIO 2 */
#define INT_GPIO3 35 /* GPIO 3 */
#define INT_GPIO4 36 /* GPIO 4 */
#define INT_CRYPTO 37 /* Crypto */
/* 38 (reserved) */
#define INT_DMC 39 /* Dual memory controller */
#define INT_NFC 40 /* NAND flash controller */
/* 41 (reserved) */
/* 42 (reserved) */
/* 43 (reserved) */
/* 44 (reserved) */
/* 45 (reserved) */
/* 46 (reserved) */
/* 47 (reserved) */
#define INT_DMA0 48 /* DMA controller */
#define INT_DMA1 49 /* DMA controller */
#define INT_DMA2 50 /* DMA controller */
#define INT_DMA3 51 /* DMA controller */
#define INT_DMA4 52 /* DMA controller */
#define INT_DMA5 53 /* DMA controller */
#define INT_DMA6 54 /* DMA controller */
#define INT_DMA7 55 /* DMA controller */
#define INT_DMA8 56 /* DMA controller */
#define INT_DMA9 57 /* DMA controller */
#define INT_DMA10 58 /* DMA controller */
#define INT_DMA11 59 /* DMA controller */
#define INT_DMA12 60 /* DMA controller */
#define INT_DMA13 61 /* DMA controller */
#define INT_DMA14 62 /* DMA controller */
#define INT_DMA15 63 /* DMA controller */
#define MAXIMASP_CHIP_IRQS 64
#define MAXIMASP_GPIO_IRQS (5*32) /* also see ARCH_NR_GPIOS */
/* irq to gpio pin(= 32*port+bit) */
#define MAXIMASP_IRQ2GPIONUM(x) ((x) - MAXIMASP_CHIP_IRQS)
/* irq to gpio port */
#define MAXIMASP_IRQ2GPIO(x) (MAXIMASP_IRQ2GPIONUM(x) >> 5)
/* gpio pin(= 32*port+bit) to irq; drivers should use gpio_to_irq() */
#define MAXIMASP_GPIONUM2IRQ(x) ((x) + MAXIMASP_CHIP_IRQS)
/* gpio port,bit to irq */
#define MAXIMASP_GPIO2IRQ(x, y) MAXIMASP_GPIONUM2IRQ(((x) << 5) | (y))
#define NR_IRQS (MAXIMASP_CHIP_IRQS + MAXIMASP_GPIO_IRQS)
/* Can route any interrupt to FIQ */
#define FIQ_START 0
/* Default interrupt priority (0=highest, 7=lowest) */
#define DEFAULT_IRQ_PRIORITY 3
#define MAXIMASP_CONFIG_IRQ 0x00
#define MAXIMASP_CONFIG_FIQ 0x08
#ifndef __ASSEMBLER__
extern int maximasp_irq_config(unsigned int irq, unsigned int val);
#endif
由上面中断号的定义可见，linux中对芯片datasheet上定义的硬件irq的中断号做了一层映射，相关外设的中断号是一一映射过来的。gpio中断号是同一组的管脚复用的，使用时要将gpio管脚转换成中断号（即request_irq申请时申请的中断号）。gpio的中断的处理分发（即发生中断时，同一组的gpio对应的datasheet中的同一个中断号，此时还要根据寄存器判断具体的哪个gpio产生的哪种类型中断）和设置（gpio的中断寄存器设置）在irq.c里实现。对应驱动开发中需要使用的中断号在irqs.h中定义（映射后的中断号）。