5.2 Instruction execution process

Article Directory

5.2.1 Instruction cycle

CPU从主存中每取出并执行一条指令所需的全部时间称为指令周期，即CPU完成一条指令的时间。
The instruction cycle is often expressed by several machine cycles, and a machine cycle contains several clock cycles (clock cycles are also called beats)
In the instruction fetch cycle, the instruction word length is equal to twice the storage word length一个指令周期包含2个机器周期
The instruction word length is generally an integer multiple of the storage word length参考例题18
Insert picture description here

5.2.2 Data flow in the instruction cycle

1. Fetching period
根据PC中的内容从主存中去除指令代码保存到IR中
Insert picture description here
2. Inter-referencing period
取操作数有效地址

3. Execution cycle
根据IR中的指令字的操作码和操作数通过ALU操作产生执行结果，不同指令执行周期操作不同
4. Interrupt cycle
处理中断请求
(1) Save breakpoints
(2) Form the entry address of the interrupt programGiven by CU, write directly to PC
(3) Hardware close interrupt
(1) and (3) Operation
0->MAR 1->W
PC->MDR
MDR->M(MAR)
Insert picture description here

5.2.3 Instruction execution plan

1. Single instruction cycle The
instructions are executed serially, and the next instruction can only be started after the previous instruction is executed. 指令周期取决于最长的指令执行时间
2. Multiple instruction cycles
Use different execution steps for different types of instructions to complete
3. Pipeline scheme
parallel execution

例题
Insert picture description here

Insert picture description here