With the rapid development of semiconductor technology, various memories have been introduced one after another, and their performance has been continuously improved. As we all know, the data in ordinary SRAM disappears immediately after the power is turned off. After power on again, the data in the memory is a random number. This is undoubtedly not allowed for application systems that need to save a large amount of field data and various system parameters. Although the data of EPROM will not be lost due to power failure, EPROM can only use a dedicated writer to write data and cannot replace the corresponding SRAM.
SRAM does not have the problem of refreshing. An SRAM basic storage unit is composed of a transistor and two resistors. It does not use a capacitor to store data, but is achieved by switching the state of the transistor, just like the transistor in the CPU can also represent 0 by switching different states. And these two states are precisely because of this structure, so the reading process of SRAM will not cause the loss of the information stored in SRAM, and of course there is no refresh problem.
EEPROM and FLASH are electrically erasable and can partially replace the corresponding SRAM, but the writing speed of EEPROM and FLASH (ms level) is too slow compared to SRAM (ns level), unable to store intermediate results generated by calculations, and cannot be random at high speed. To write a large amount of data, the number of EEPROM and FLASH writes is limited (about 100,000 times), while SRAM can be written unlimited times. More importantly, unless the chip select signal of EEPROM and memory Flash is controlled by a special circuit, , Error writing will occur during power failure. Although FLASH has hardware and software write protection, its protection algorithm is very inconvenient to use and the effect is not ideal. It cannot replace SRAM in most applications.