Linux Kernel Fully Annotated v3.0 - Chapter 6

6.1 General functions

• The BIOS performs some system detection and starts initializing the interrupt vector at physical address 0
• The first sector of the BIOS boot device reads bootsect.s into the absolute address 0x7C00 of the memory and jumps to this place
• The bootsect.s program starts to execute, and moves itself to the position of 0x90000, and reads the setup.s code into the memory 0x90200, and at the same time reads the system module into the memory address 0x10000
• The setup.s function is executed, and the system module is moved to the starting position of the physical memory
• head.s loads IDT, GDT and LDT, and finally calls the main() program in init/main.c
• For the kernel code to run, a basic file system is also required

6.2 bootsect.s program

6.2.1 Functional description

• Move yourself to the beginning of the absolute memory address 0x90000 and continue execution
• Load the setup module of the 4 sectors starting from the 2nd sector of the disk into the memory
• Load the system module to the beginning of memory 0x10000

6.2.2 Code comments

6.2.3 Other information

6.2.3.1 Linux0.11 hard disk device number

6.2.3.2 Boot the system from the hard disk

• After the system is powered on, the first sector of the bootable hard disk will be loaded into the kernel at 0x7c00 by the BIOS and start to execute
• The program will first move itself down to memory 0x600
• Then load the first sector in the active partition according to the partition table information in the MBR to memory 0x7c00, and then start executing

6.3 setup.s program

6.3.1 Functional description

• Use the ROM BIOS interrupt to read the machine system data, and save the data to the position starting from 0x90000
• The setup program moves the system module from 0x10000-0x8ffff to the absolute memory address 0x00000
• Load idtr and gdtr, turn on the A20 address line, reset the two interrupt control chips 8259A, and reset the hardware interrupt number to 0x20 - 0x2f
• Set the control register CR0 of the CPU to enter 32-bit protected mode operation
• Jump to the head.s program of the system module to run

6.3.2 Code comments

6.3.3 Other information

6.3.3.1 Current memory image

6.3.3.2 BIOS Video Terminal 0x10

6.3.3.3 Hard disk basic parameter table ("INT 0x41")

6.3.3.4 A20 address line problem

6.3.3.5 Programming method of 8259A terminal controller

1. IRR is connected to the interrupt signal line of the peripheral;

2. IMR controls which interrupt line on IRR is shielded, that is, it is not sent to PR

3. When multiple interrupts are sent to the PR, the PR sends an INT signal with the highest priority to the CPU through parsing

4. The CPU will send an INTA to the 8259A to respond to the interrupt signal after executing the current instruction

5. After receiving the corresponding signal, 8359A will save the selected highest priority interrupt request to ISR, and at the same time, the corresponding bit in IRR will be reset

6. The CPU will want the 8259A to send the second INTA pulse signal, which is used to notify the 8259A to send the interrupt number

7. Finally, there is the question of how to clear the bits in the ISR

   • The 8259A that automatically ends the interrupt will automatically clear the ISR after sending the second INTA pulse signal
   • The 8259A that does not automatically end the interrupt needs the CPU to send it an end interrupt command to reset the bit in the ISR

6.4 head.s program

6.4.1 Functional description

1. AT&T's assembly language format is used, so the assignment direction is from left to right
2. The function is to load each data segment register, reset the interrupt descriptor table idt, a total of 256 items, and make each table item point to a dumb interrupt subroutine ignore_int that only reports errors
3. Reset the global segment descriptor table gdt, and place the gdt table in a reasonable place for the memory kernel code
4. Detect whether the A20 address line is really turned on, if it is not turned on, it will enter an infinite loop
5. Test whether the PC contains a math coprocessor chip, and set the corresponding flag in CR0
6. Set the paging processing mechanism for managing memory, and place the page directory table at the beginning of absolute physical address 0
7. Finally, the head.s program uses the return instruction to pop the entry address of the /init/main.c program pre-placed in the stack to run the main() program

6.4.2 Code comments

6.4.3 Other information

6.4.3.1 Memory image after program execution

6.4.3.2 Intel 32-bit protected operation mechanism