Detailed pseudo-random code

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Pseudo-random code

The concept of pseudorandom sequence

Pseudorandom sequences should have properties similar to random sequences. In engineering, binary {0,1} sequences are commonly used to generate pseudorandom (noise) codes, which have the following characteristics:

  • In each period of the random sequence, 0 and 1 occur approximately equally.
  • In each cycle, the length is n \boldsymbol{n}The number of occurrences of a run of n ( symbol strings of the same symbol) is twice as many as that of a run of length n+1.
  • The autocorrelation of random sequences is similar to the properties of the white noise autocorrelation function.

The definition of pseudo-random code can be written as

(1) Where the autocorrelation function has

ρ x ( j ) = { ∑ i = 1 n x i 2 p = 1 , j = 0 ∑ i = 1 n x i x i + j p = − 1 p , j ≠ 0 . \rho_{x}(j)=\{\begin{array}{l} \sum_{i=1}^{n} \frac{x_{i}^{2}}{p}=1, \quad j=0 \\ \sum_{i=1}^{n} \frac{x_{i} x_{i+j}}{p}=-\frac{1}{p}, j \neq 0 \end{array}. rx(j)={ i=1npxi2=1,j=0i=1npxixi+j=p1,j=0.

The code of the form is called a pseudo-random code, also known as a narrow pseudo-random code.

(2) Where the autocorrelation function has

ρ x ( j ) = { ∑ i = 1 n x i 2 / p = 1 j = 0 ∑ i = 1 n x i x i + j / p = a < 1 j ≠ 0 . \rho_{x}(j)=\{\begin{array}{ll} \sum_{i=1}^{n} x_{i}^{2} / p=1 & j=0 \\ \sum_{i=1}^{n} x_{i} x_{i+j} / p=a<1 & j \neq 0 \end{array}. rx(j)={ i=1nxi2/p=1i=1nxixi+j/p=a<1j=0j=0.

A code of the form is called a generalized pseudorandom code. Narrow-sense pseudo-random codes are a special case of generalized pseudo-random codes.

Pseudorandom Sequence Generation

You can use the shift register as a pseudo-random code generator. Figure 1 is a 4-stage shift register, which can generate pseudo-random sequences. The feedback logic in Figure 1 is
an = an − 3 ⊕ an − 4 a_{n}=a_{n-3} \oplus a_{n-4}an=an3an4
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When the initial state of the shift register is an − 4 = 1 a_{n-4}=1an4=1, a n − 3 = 0 a_{n-3}=0 an3=0, a n − 2 = 0 a_{n-2}=0 an2=0, a n − 1 = 0 a_{n-1}=0 an1=0 , after one clock beat, the state of each level moves from left to right to the next level, and the last stage outputs a single digit, and at the same time, the output of the modulo two adder is added to the first stage of the shift register, thus forming a shift register The new state of , the next clock tick arrives and the above process continues, and the output sequence of the final stage is a pseudo-random sequence. Under this condition, the generated pseudo-random sequence is

This is a pseudo-random sequence with period length p=15.

When the initial state of the above figure is the 0 state, namely an − 4 = an − 3 = an − 2 = an − 1 = 0 a_{n-4}=a_{n-3}=a_{n-2}= a_{n-1}=0an4=an3=an2=an1=The output of the zero shifter is a sequence of zeros.

The 4-level shift register has 16 states in total, except for a 0 state, there are 15 states. For Figure 1, as long as the period of the random sequence reaches the maximum value, no matter how the initial state of the shift register is changed at this time, its output only changes the initial phase of the sequence, and the ordering law of the sequence will not change.

But if the feedback logic of the four-stage shift register in the figure is changed, its output sequence will change.

The feedback logic in the figure below is an = an − 2 ⊕ an − 4 a_{n}=a_{n-2} \oplus a_{n-4}an=an2an4, the initial state is 1111, the output sequence is 111100111100111…

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The feedback logic is an = an − 2 ⊕ an − 4 a_{n}=a_{n-2} \oplus a_{n-4}an=an2an4, when given different initial states 1111, 0001, 1011, three completely different output sequences 111100111100…, 000101000101…, 101101101101 can be obtained. Their periods are 6, 6, and 3, respectively.

From this, we can draw the following conclusions:

(1) The output sequence of the linear shift register is a periodic sequence.

(2) When the initial state is the 0 state, the output of the linear shift register is a 0 sequence.

(3) The output sequence of the linear shift register with the same number of stages is related to the feedback logic of the register.

(4) The sequence period p < < 2 n − 1 p^{<}<\mathbf{2}^{n}-1p<<2n1 (n-stage linear shift register) The output of the same linear shift register is also related to the initial state.

(5) Sequence period pn = 2 n − 1 p^{n}=2^{n}-1pn=2n1 linear shift register, changing the initial state of the shift register only changes the initial phase of the sequence, while the ordering rule of the periodic sequence remains unchanged.

references:

  1. Proakis, John G., et al. Communication systems engineering. Vol. 2. New Jersey: Prentice Hall, 1994.
  2. Proakis, John G., et al. SOLUTIONS MANUAL Communication Systems Engineering. Vol. 2. New Jersey: Prentice Hall, 1994.
  3. Zhou Jiongpan. Communication Principles (3rd Edition) [M]. Beijing: Beijing University of Posts and Telecommunications Press, 2008.
  4. Fan Changxin, Cao Lina. Principles of Communication (7th Edition) [M]. Beijing: National Defense Industry Press, 2012.

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