verilog notes--$time, $realtime, initialization memory, $random, `timescale

1. $time and $realtime
The difference is:
$time\; always\; outputs\; aninteger\; .\; When\; outputting\; a\; number\; that\; has\; undergone\; scale\; conversion,itmust\; be\; rounded\; first.\; The$ realtime statement will not round the output, resulting in a difference in the output effects of the two.

`timescale 10 ns / 1ns
	module test;
	reg set;
	parameter   p = 1.6;
	initial
		begin
		$monitor($time, , "set = ",set);
		#p  set = 0;
		#p  set = 1;
		end
endmodule

The output result is:
0 set = x
2 set = 0
3 set = 1

`timescale 10 ns / 1ns
	module test;
	reg set;
	parameter   p = 1.6;
	initial
		begin
		$monitor($realtime, , "set = ",set);
		#p  set = 0;
		#p  set = 1;
		end
endmodule

The output result is:
0 set = x
1.6 set = 0
3.2 set = 1

2.Initialize memory
When the data file is read, each read number is stored in a memory unit with a continuous address. The storage address range of the memory unit is determined by the start address and end address of the book name in the system task declaration statement. The storage address of each data is stated in the data file. The format is:
@+hexadecimal number.
When the system task encounters an address description, the system task stores the data after the address into the corresponding address unit in the memory.

//	初始化存储器
module  test;

reg[7:0]    memory[0:7];//声明有八个八位的存储单元
integer   i；

initial
	begin
	// 读取存储器文件 init.dat 到存储器中的给定地址
	$readmemb("init.dat", memory);
	// 显示初始化后的存储器内容
	for (i = 0; i < 8; i = i + 1)
		$display("Memory[%d] = %b", i, momory[i]);

end

Notice:
① If there is no address description in the system task declaration statement or the data file, the default storage starting address is the starting position in the memory definition statement, and the data in the data file is continuously stored in the memory until it is stored. The unit is full and the data in the data file has been saved.
② If both the start address and the end address are specified in the system task declaration statement, the data will be stored according to this address, regardless of the address in the memory definition statement; ③ If the number of data is different from the address storage location, an error will be prompted
. information

// 定义一个有256个地址的字节存储器 mem
reg[7:0] mem[1:256]

//分别使用不同的系统任务装载
initial  $readmemh("mem.dat", mem);
initial  $readmemh("mem.dat", mem,16);
initial  $readmemh("mem.dat", mem ,128,1);

When the simulation time is zero, the first statement will load the data into the memory with the memory unit with address 1 as the storage unit. In the second statement, the data will be stored in the memory starting from the memory unit with unit address 16 until the unit with address 256. The third statement will load the data starting from the unit with address 128 and going to the unit with address 1. In the third statement, the system checks whether there are 128 pieces of data in the data file. If not, an error is reported.

3. The $random statement is used to generate random pulses or pulse sequences with random widths.

`timescale  1 ns / 1 ns
module random_pulse(dout);
output[9:0] dout;
reg[9:0]  dout;

integer delay1, delay2, k;
initial
	begin
	#10 dout = 0;
	for (k = 0; k < 100; k = k + 1)
		begin
			delay1 = 20 * ({
    
     $random } % 6);
			// delay1 在 0~100 ns间变化
			delay2 = 20 * (1 + {
    
    $random} % 3);
			// delay2 在20~60ns间变化
			#delay1  dout = 1 << ({
      
      random} % 10);
			// dout的0~9位中随机出现1，并出现的时间在0~100ns间变化
			#delay2  dout = 0;
			// 脉冲的宽度在20~60ns间变化
		end
	end
endmodule

4. Time scale`timescale
The time scale is used to describe the time unit and time precision of the module that follows the instruction. This command can be used to implement modules with different time units in the same design.