verilog notes - avoid latches, delayed reference times, and loop statements

Teacher Xia’s book

Points to note in case statements:
cram
Used to handle the comparison process that does not consider the high resistance value Z

reg [7:0] ir;
casez(ir)
	8`b1???????:instruction1(ir);
	8`b01??????:instruction2(ir);
	8`b00010???:instruction3(ir);
	8`b000001??:instruction4(ir);
endcase

casex
Used to handle the comparison process that does not consider high resistance value Z and uncertain value

reg [7:0] ir;
casez(ir)
	8`b1???????:instruction1(ir);
	8`b01??????:instruction2(ir);
	8`b00010???:instruction3(ir);
	8`b000001??:instruction4(ir);
endcase

2. Improper operation generates a latch.
In the always block, if the variable is not assigned a value under the given conditions, the variable will retain its original value, which means a latch will be generated.

///有锁存器
always @(al or d)
	begin
		if(al) q = d;
	end

///无锁存器
always @(al or d)
	begin
		if(al) q = d;
		else q = 0;
	end

If there is no default statement in the case statement, except for special values, other values ​​will maintain their original values, and a latch will be generated.

///有锁存器
always @(sel [1:0] or a or b)
case(sel[1:0])
	2`b00:q<=a;
	2`b01 :q<=b;
endcase

///无锁存器
always @(sel [1:0] or a or b)
case(sel[1:0])
	2`b00:q<=a;
	2`b01 :q<=b;
	default:q<= `b0;
endcase	

3. Loop statement
forever statement: often used to generate periodic waveforms and used as simulation test signals. The difference from always is that it cannot be written in a separate statement and must be unloaded in the initial block.
repeat statement: usually a constant expression.

//使用repeat语句实现乘法器
parameter  size = 8,longsize = 16;
ref [size:1]  opa,opb;
rge[longsize:1] result;

begin:mult
	reg [longsize:1] shift)opa,shift_opb;
	shift_opa = opa;
	shift_opb = opb;
	result = 0;
	repeat(size)
	begin
	if(shift_opb[1])
		result = result + shift_opa;

	shift_opa = shift_opa <<1;
	shift_opb = shift_opb >>1;
	end
end

4. Sequential blocks and parallel blocks.
The statements in the sequence block are executed one after another in order. Only the previous statement is executed before the subsequent statement can be executed (except for non-blocking assignment statements with built-in delay control); delay is relatively The simulation time when a statement is executed.

Parallel block (fork-join) statements are executed in parallel, and the order of execution is determined by the delay or time control within the respective statements; the delay of the statement is relative to the moment when the block statement starts execution.

//带延迟的顺序块
reg x,y;
reg[1:0] z,w;

initial
begin
	x = 1`b0;
	#5 y = 1`b1;
	#10 z = {
    
    x,y};
	#20 w = {
    
    y,x};
end

//并行块
reg x,y;
reg[1:0] z,w;

initial
fork
	x = 1`b0;
	#5 y = 1`b1;
	#10 z = {
    
    x,y};
	#20 w = {
    
    y,x};
join

Be aware of the competition-risk-taking phenomenon.