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1. Solve the problem of waveform oscillation at the moment when the buck chip is powered on
Buck chip output oscillation case when power is off
Overview of phenomenon
During the power-off test of a certain BUCK chip, it was found that when the output terminal is powered off with a load, the output terminal will jitter, and the jitter will be more obvious under heavy load. The test waveform is as shown in Figure 1 (load condition: 500mA), as shown in Figure 2 (loading condition: 1000mA). 
Figure 1 Output waveform with a load of 500 mA 
Figure 2 Output waveform with a load of 1000 mA
process analysis
In this case, we use an oscilloscope to capture the input pin VIN, enable pin EN, and output pin VOUT of BUCK, as shown in Figure 3 below. Observing the three waveforms, we can see that when the input voltage is lower than the minimum input voltage of the BUCK chip, the output voltage begins to drop significantly, corresponding to moment A on the waveform diagram. At this time, the output voltage drops synchronously with the decrease of the input voltage. When the output of the BUCK chip is not enough to drive the subsequent load, the output voltage begins to drop instantaneously. But at this time we found that the enable pin of this chip was enabled until time B, so the output was enabled again, and the output voltage was tried to be pulled up again, but because of the further drop in the input voltage at this time, the output was no longer able to To meet the load consumption, the output voltage can only continuously switch between normal output and low potential, which is the waveform shown in Figure 1 and Figure 2. As time goes by, when the enable terminal is completely closed, the output drops to a low level and the oscillation disappears. 
Figure 3 Waveforms of output terminal VOUT, input terminal VIN, and enable terminal EN
Solution
From the analysis process, we can see that the key to the oscillation problem is that when the power chip is in load mode, when the input is removed, the enable pin fails to be disabled in time. Therefore, to rectify this problem, software engineers will be required to turn off all outputs immediately after detecting a system power outage.
Buck chip output oscillation case immediately after power-on
Overview of phenomenon
When a certain power supply chip is powered on, the output voltage oscillates back and forth, as shown in Figure 4 below. 
Figure 4
process analysis
When a colleague measured power on and off, he found that the output voltage oscillated when powering on and off, as shown in Figure 4. After zooming in, he found that when the oscillation occurred at power-on, the EN enable pin met the chip startup requirements, but this When the input voltage is still low, the chip is pulled down by the back-end load immediately after it is turned on, and the cycle continues until the oscillation disappears when the enable pin and input voltage both meet the requirements of the chip's working design circuit.
Solution
From the above analysis, we can know that the power-on output oscillates because the enable pin is effective earlier than the input voltage. Therefore, we can add a small capacitor to the EN pin to delay the rise time of the enable to meet the expected design requirements; In addition, we can also appropriately adjust the ratio of the voltage dividing resistor so that when the input voltage meets the minimum input requirement of the design circuit, the voltage obtained by the EN pin is just enough to effectively turn on the power chip.