The first 1 Chapter computer organization and architecture
Some may think that does not require knowledge systems architect or the underlying principles of computer hardware. Because this level of a few tend to have a good package deal, you do not need to re-architect planning. However, the fact is not the case, the system build on top of the hardware and operating system, if we do not have some knowledge of the principles underlying computer, can cause a range of security and performance issues. Terms of the composition of this chapter from the computer, the computer instructions systems, storage systems, etc. to start on.
1.1 computer systems
The computer system is a complex hardware and software, it can be seen as multi-level hierarchy by function.
1.1.1 computer hardware component
Hardware generally refers to all visible, touch the device resulting entity. The original von • Neumann (VonNeumann) Total computer architecture based on operator-centric, but to the present, the center has shifted to the memory. FIG 1-1 shows the basic block diagram a computer.
(1) controller. The controller is analyzed and components executing instructions, but also the unity of command and control centers to coordinate the work of various components of computer components, is based on machine instructions. The controller comprises the following composition.
① program counter PC: lower memory address of the instruction to be executed;
② instruction register IR: storing instructions to be executed;
③ instruction decoder ID: opcode field of the instruction is analyzed interpretation;
④ timing member: providing a timing control signal.
(2) operator . Operator is also referred to an arithmetic logic unit (ArithmeticandLogicUnit, ALU), whose main function is to perform various arithmetic and logic operations under control of the controller. Calculator comprises the following composition.
① The arithmetic logic unit ALU: arithmetic and logic operations on data;
② accumulation registers the AC : general purpose registers for ALU provides a work area for use in temporary data;
③ Data Buffer Register DR: write memory for temporarily storing instructions or data;
The PSW register status condition ④: memory status flags and control flags (controversial point: normalized to have the controller).
(3) a main memory. The main memory is also called a memory ( commonly referred to as "memory" or "main memory") . Now store information and intermediate results of field operations, including data and machine instructions.
(4) a secondary memory. Auxiliary memory is also referred to as external memory, commonly referred to as secondary memory or external memory . Store a variety of information required long-term preservation.
(5) an input device. The input device is the task and people - programmed to the original data to the computer, and and converts them into an internal computer can recognize and accept information mode. According to the shape of the input information can be divided into character
(Including Chinese character) input, graphical input, image input and voice input. At present, the common input device has a keyboard, mouse standard, scanners and so on.
(6) an output device. The output device is the task of processing results to a computer or other device that can accept the form of computer-out. Currently, the most common output device is a printer and a display . Some devices may be input devices , output devices and can be, e.g., secondary memory, digital to analog conversion means, such as automatic control and monitoring systems used.
1.1.2 Classification of Computer Architecture
Development of computer experience a tube and transistor era, the era of integrated circuits (small and medium scale, large-scale, large scale, and even large-scale and very large scale) . Currently, the dollar on the world's highest level of monolithic integrated circuit chip accommodated in quantity has reached more than 80 one hundred million.
- Stored program concept
The concept of "stored program" is von • Neumann et al. 1946 Nian 6 Yue first put forward, it may be briefly summarized as follows:
(1) a computer (hardware means) should calculator, a memory, a controller, input and output devices of five basic components.
Internal (2) the computer using binary to represent instructions and data.
(3) The program programmed in advance and the original data stored in the memory, and then restart the computer work. This is the basic meaning of storing the program. Von • Neumann's greatest contribution to the world of computers is "stored program control" proposed and implemented the concept. More than sixty years, although the pace of development of the computer astonishing, but its structural principle, the vast majority of meter computer is still based on the concept of storing programs. Usually the computer program in line with the concept of storage systems called von • Neumann computer . Of course, modern computer compared with early computers, the structure still has a lot of improvement.
With the continuous development of computer technology, but also exposed the von major weakness • Neumann type computer: memory access will become a bottleneck. At present, there have been some breakthroughs stored program control computer, referred to as non-von Neumann computer • For example, a data stream of computer data-driven, demand-driven and pattern-matching reduction computer-driven intelligent computer and so on.
- Flynn classification
In 1966, Michael. J. Flynn made according to an instruction stream, multiple data stream feature to classify the computer system (commonly referred to Flynn taxonomy), the relevant defined as follows.
(1) an instruction stream: a machine instruction sequence execution means;
(2) data streams: a data sequence from the instruction stream refers to the call, including the input data and intermediate results, but does not include an output data.
Depending on the instruction stream Flynn - data flow organization, the computer system is divided into the following four categories.
(1) a single instruction stream single data stream (Single Instruction stream and Single Data stream, SISD): SISD is actually executed by a single processor computer traditional sequential, which means a time for an instruction decoding instructions, and only the a component data distribution operation.
(2) a single finger command stream multiple number of data streams (Single Instruction stream and Multiple Data stream , SIMD): SIMD parallel processor (matrix processor) represented parallel processor comprising a plurality of repeating units of processing, a single instruction control means, in accordance with the same instruction stream requires a different distribution of data required for each thereof.
(3) Multi- finger command stream single number data streams (Multiple Instruction stream and Single Data stream , MISD): MISD processing unit having n, n according to the requirements of different pieces of the same instruction stream data and intermediate results of different treatments. Outputting a processing unit and an input of another processing unit. Such systems actually on the rarely seen. Document considered to have a plurality of instruction pipeline means, said pipelined computer is MISD.
(4) MIMD (Multiple Instruction Stream Multiple and the Data Stream, the MIMD ): the MIMD refers levels to achieve comprehensive multi-parallel system operations, tasks, commands and the like. The multi-core processors, multi-processing
Machine is MIMD.
1.1.3 Complex Instruction Set System with Reduced Instruction Set System
In the course of development of the computer system architecture, design optimization instruction has two diametrically opposite directions, enhancing a function instruction, the instruction set some complex functions, some originally implemented by software, hardware use common functions instructions to implement the system, such a computer system, known as complex instruction set computer (complex instruction Set computer, CISC); other command functions are as simple as possible, leaving only those functions simple, complete instructions can be executed in a beat, more complex functionality implemented by subprogram, such a computer system is called a Reduced instruction Set computer
（Reduced Instruction Set Computer，RISC）。
- Features of the CISC instruction
The main features of CISC instruction is as follows:
(1) the large number of instructions. Instruction has a number of instructions, usually 100 to 250.
(2) instructions to use frequency disparities. The most commonly used are some of the more simple instructions, only the total number of instruction 20% , but the frequency of occurrence in the program accounted for 80%. The most complex commands but rarely used.
(3) support a variety of addressing modes. Supported addressing mode is generally from 5 to 20 species.
(4) Variable length instructions. Instruction length is not fixed, variable length instructions increases the complexity of the instruction decoding circuit.
(5) instructions for the data main memory unit can be directly processed. A typical CISC instructions can usually have the data in the main memory unit direct process, which performs slower.
(6) to the main microprogram control. CISC instruction set is complex, difficult to implement the controller using hard-wired logic (combinational logic) circuit, usually microprogram control.
- Features RISC instruction set
RISC instruction requires simple and the operation is completed in a single cycle, consistent seek instruction format, addressing minimize, and enhance coding efficiency, and ultimately achieve the purpose of accelerating the processing speed of the machine. The main features of the system as RISC instruction.
(1) a small number of instructions. Prefers the most frequently used simple instructions and some common commands, to avoid the use of complex instructions. Providing only the LOAD (reading from memory) and the STORE (data writing memory) instruction to two memory operations, all of the remaining operations are performed between the CPU registers.
(2) less addressing mode instructions. Typically support only register addressing, the addressing number and relative addressing mode immediately.
(3) the instruction length is fixed, less instruction kind of format. Since RISC small number of instructions, small format, is relatively simple, the instruction length is fixed, each field is divided between instructions more consistent, relatively easy to decode.
(4) mainly to hard-wired logic control. In order to increase execution speed of the operation, typically constructed using hardwired logic controller (combinatorial logic).
(5) single-cycle instruction execution, pipelining techniques. Because the simplified command system, it is easy to use pipeline technology art, so that most instructions can be completed in a single machine cycle. A few may require multi-cycle instruction, for example, the LOAD / STORE instruction because of the need to access memory, its execution time is longer.
(6) an optimizing compiler: RISC reduced instruction set enables the compiler to simplify the work. Because the instruction length is fixed, small format, addressing less, do not have to select a number of instructions having similar functions in the compile-time, do not choose to bother addressing mode, while being easy to optimize, can be performed efficiently generate machine code.
(7) CPU plurality general register number, usually more than 32, up to some thousands.
Most RISC uses Cache scheme, using the Cache to speed instruction fetch. Moreover, some RISC two separate Cache to improve performance. A command called the Cache , the other data referred to the Cache . Thus, instruction fetch and data fetch may be performed simultaneously, without disturbing each other.
1.1.4 Bus
Bus is a set of a plurality of members capable of time-sharing common information transmission line. Sharing means may be a plurality of hook members on the bus, to exchange information between the various components of the set are available through a public line transmission; means sharing the same time a member is allowed only sends information to the bus, if there are two or two or more components to the bus to send information simultaneously, a conflict will inevitably lead to a signal. Of course, at the same time, allowing a plurality of members receive the same information from the bus.
With respect to the bus by CPU or other chip positions it can be divided into two kinds of internal buses and the external bus. In the CPU inside, between the registers and arithmetic logic unit bus to transfer data between the ALU and control means used is called internal bus; external bus refers to the CPU and memory RAM, ROM and input / path for performing communication between the output device interface. Since the CPU bus for instruction fetch via the program, the memory / peripherals exchange data, in certain cases the CPU and peripheral bus speed is the biggest factor restricting the overall computer performance.
Divided by bus function, it can be divided into an address bus, a data bus, a control bus categories, commonly referred to as bus comprises three components, an address bus for transferring address information, a data bus for transferring data information , a control bus for transmitting various control signals.