STM32F4 register initialization series: when Zhongkai Qi

. 1  static  void RCC_Init ( void )
 2  {
 . 3    RCC-> APB1ENR | = . 1 << . 17 ;   // enable serial clock 2 
. 4    RCC-> APB1ENR | = . 1 << 14 ; // SPI2 clock enable 
. 5    RCC-> APB2ENR | = . 1 << 12 is ; // enable clock SPI1 
. 6    RCC-> APB2ENR | = . 1 << . 8 ;     // enable ADC1 
. 7    RCC-> APB2ENR | = . 1 << . 9 ;     // enable the ADC2 
. 8   RCC-> APB2ENR | = . 1 << 10 ;     // enable ADC3 
. 9    RCC-> APB2ENR | = . 1 << 14 ;     // enable SYSCFG clock 
10    
. 11    RCC-> AHB1ENR | = . 1 ;     // enable clock PORTA 
12 is    RCC-> AHB1ENR | = . 1 << . 1 ;     // enable PORTB clock 
13 is    RCC-> AHB1ENR | = . 1 << 2 ;     // enable clock PORTC 
14    RCC-> AHB1ENR | = . 1 << . 3 ;     // PORTD clock enable 
15   RCC-> AHB1ENR | = . 1 << . 4 ;      // enable clock PORTE 
16    RCC-> AHB1ENR | = . 1 << . 5 ;      // enable PORTE clock 
. 17    RCC-> AHB1ENR | = . 1 << . 6 ;     // make can PORTG clock 
18 is    
. 19    RCC-> APB1ENR | = . 1 << 20 is ;       // enable serial 5 clock 
20 is    RCC-> APB1ENR | = . 1 << . 19 ;       // enable serial 4 clock 
21 is    RCC-> APB1ENR | = . 1 << 18 ;       //3 serial clock enable 
22 is    RCC-> APB1ENR | = . 1 << . 17 ;       // enable serial second clock 
 23 is    
24    // the DMA 
25    RCC-> AHB1ENR | = . 1 << 21 is ; // the DMA1 clock enable   
26 is    RCC- > AHB1ENR | = . 1 << 22 is ; // DMA2 clock enable 
27    
28    RCC-> APB1ENR | = . 1 << . 1 ;          // TIM3 clock enable   
29    RCC-> APB1ENR | = . 1 << 2 ;          // of TIM4 clock enable    
30   RCC-> APB2ENR | = . 1 << 0 ;         // TIM1 clock enable 
31 is    RCC-> APB2ENR | = . 1 << . 1 ;         // TIM8 clock enable 
32 }

 

Guess you like

Origin www.cnblogs.com/penuel/p/11265260.html