GPIO_InitTypeDef GPIO_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_InitTypeDef ADC_InitStructure; ADC_DeInit(); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);//ʹÄÜGPIOAʱÖÓ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); //ʹÄÜADC1ʱÖÓ //Ïȳõʼ»¯ADC1ͨµÀ5 IO¿Ú GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;//PA5 ͨµÀ5 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;//Ä£ÄâÊäÈë GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;//²»´øÉÏÏÂÀ GPIO_Init(GPIOA, &GPIO_InitStructure);//³õʼ»¯ RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1,ENABLE); //ADC1¸´Î» RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1,DISABLE); //¸´Î»½áÊø ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;//¶ÀÁ¢Ä£Ê½ ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;//Á½¸ö²ÉÑù½×¶ÎÖ®¼äµÄÑÓ³Ù5¸öʱÖÓ ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; //DMAʧÄÜ ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div4;//Ô¤·ÖƵ4·ÖƵ¡£ADCCLK=PCLK2/4=84/4=21Mhz,ADCʱÖÓ×îºÃ²»Òª³¬¹ý36Mhz ADC_CommonInit(&ADC_CommonInitStructure);//³õʼ»¯ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;//12λģʽ ADC_InitStructure.ADC_ScanConvMode = DISABLE;//·ÇɨÃèģʽ ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;//¹Ø±ÕÁ¬Ðøת»» ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising;//´¥·¢¼ì²â,ÉÏÉýÑØ´¥·¢ ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T5_CC1; //TIM5_CC1´¥·¢ ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;//ÓÒ¶ÔÆë ADC_InitStructure.ADC_NbrOfConversion = 1;//× ª 1¸ö »» ÔÚ¹æÔòÐòÁÐÖÐ Ò²¾ÍÊÇÖ »× ª» »¹æÔòÐòÁÐ1 ADC_Init (ADC1, & ADC_InitStructure); // ADC³õʼ» ¯ ADC1 -> CR2 is | = 0x0200 ; // ADCDMA loop transmission mode, the DDS must positions. 1 ADC_DMACmd (ADC1 , the ENABLE); // 400KHz²ÉÑùÆμÂÊ ¬2.5us = £ £ £ ¨12 ¼ä © + ²ÉÑùÊ ± / ± ¼ä ¬²ÉÑùÊ £ 21M <40.5¸öÖÜÆÚ // 1MHZ sampling frequency, 1us = (12+ sampling time) / 21M sampling time <9 cycles ADC_Cmd (ADC1, the ENABLE); // ¿ × ª ªÆôAD »» ÷ Æ to ADC_RegularChannelConfig (ADC1, . 5 , . 1 , ADC_SampleTime_3Cycles); // ADC1, ADCͨμÀ, 28¸öÖÜÆÚ
Trigger setting the clock TIM5
void Timer5_Init ( int arr, int psc) { TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; // NVIC_InitTypeDef NVIC_InitStructure; // NVIC¿âº¯Êý½á¹¹Ìå TIM_OCInitTypeDef TIM_OCInitStructure; RCC_APB1PeriphClockCmd (RCC_APB1Periph_TIM5, ENABLE); // Ê ± ÖÓʹÄÜ TIM_TimeBaseStructure.TIM_Period = arr; // ÉèÖÃÔÚÏÂÒ »¸ö¸üÐÂʼþ × ° ee" μÄ Ô¶¯ÖØ × × ÷ ° ÔؼÄ'æÆ ÖÜÆÚμÄÖμ¼ÆÊýμ½10000Ϊ1s TIM_TimeBaseStructure.TIM_Prescaler =psc; //ÉèÖÃÓÃÀ´×÷ΪTIMxʱÖÓƵÂʳýÊýµÄÔ¤·ÖƵֵ10KhzµÄ¼ÆÊýƵÂÊ TIM_TimeBaseStructure.TIM_ClockDivision = 0; //ÉèÖÃʱÖÓ·Ö¸î:TDTS = Tck_tim TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIMÏòÉϼÆÊýģʽ TIM_TimeBaseInit(TIM5, &TIM_TimeBaseStructure); //¸ù¾ÝTIM_TimeBaseInitStructÖÐÖ¸¶¨µÄ²ÎÊý³õʼ»¯TIMxµÄʱ¼ä»ùÊýµ¥Î» //³õʼ»¯TIM5 Channel1 PWMģʽ TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; //Ñ¡Ôñ¶¨Ê±Æ÷ģʽ:TIMÂö³å¿í¶Èµ÷ÖÆģʽ2 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; //±È½ÏÊä³öʹÄÜ TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //Êä³ö¼«ÐÔ:TIMÊä³ö±È½Ï¼«ÐÔ¸ß TIM_OCInitStructure.TIM_Pulse=40; TIM_OC1Init(TIM5, &TIM_OCInitStructure); //¸ù¾ÝTÖ¸¶¨µÄ²ÎÊý³õʼ»¯ÍâÉèTIM5 OC1 // //TIM2 NVIC ÅäÖà // NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn; //TIM2ÖÐ¶Ï // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; //ÏÈÕ¼ÓÅÏȼ¶2¼¶ // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //´ÓÓÅÏȼ¶0¼¶ // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨµÀ±»Ê¹ÄÜ // NVIC_Init(&NVIC_InitStructure); //¸ù¾ÝNVIC_InitStructÖÐÖ¸¶¨µÄ²ÎÊý³õʼ»¯ÍâÉèNVIC¼Ä´æÆ÷ TIM_OC1PreloadConfig(TIM5, TIM_OCPreload_Enable); //ʹÄÜTIM5ÔÚCCR1ÉϵÄԤװÔؼĴæÆ÷ TIM_ARRPreloadConfig(TIM5,ENABLE); //ARPEʹÄÜ TIM_Cmd(TIM5, ENABLE); //ʹÄÜTIMxÍâÉè } Timer5_Init(84-1,0);
DMA configuration, start the DMA interrupt
DMA_InitTypeDef DMA_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; //NVIC¿âº¯Êý½á¹¹Ìå if((u32)DMA_Streamx>(u32)DMA2)//µÃµ½µ±Ç°streamÊÇÊôÓÚDMA2»¹ÊÇDMA1 { RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2,ENABLE);//DMA2ʱÖÓʹÄÜ }else { RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1,ENABLE);//DMA1ʱÖÓʹÄÜ } DMA_DeInit(DMA_Streamx); while (DMA_GetCmdStatus(DMA_Streamx) != DISABLE){}//µÈ´ýDMA¿ÉÅäÖà /* ÅäÖà DMA Stream */ DMA_InitStructure.DMA_Channel = chx; //ͨµÀÑ¡Ôñ DMA_InitStructure.DMA_PeripheralBaseAddr = par; //DMAÍâÉèµØÖ· DMA_InitStructure.DMA_Memory0BaseAddr = mar; //DMA ´æ´¢Æ÷0µØÖ· DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; //´æ´¢Æ÷µ½ÍâÉèģʽ DMA_InitStructure.DMA_BufferSize = ndtr; //Êý¾Ý´«ÊäÁ¿ DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;//ÍâÉè·ÇÔöÁ¿Ä£Ê½ DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //´æ´¢Æ÷ÔöÁ¿Ä£Ê½ DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;//ÍâÉèÊý¾Ý³¤¶È:8λ DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word ;//´æ´¢Æ÷Êý¾Ý³¤¶È:8λ DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; // ʹÓÃÆÕͨģʽ DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; //ÖеÈÓÅÏȼ¶ DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; //´æ´¢Æ÷Í»·¢µ¥´Î´«Êä DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; //ÍâÉèÍ»·¢µ¥´Î´«Êä DMA_Init(DMA_Streamx, &DMA_InitStructure); //³õʼ»¯DMA Stream //DMA NVIC ÅäÖà NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn; //DMAÖÐ¶Ï NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; //ÏÈÕ¼ÓÅÏȼ¶2¼¶ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //´ÓÓÅÏȼ¶1¼¶ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨµÀ±»Ê¹ÄÜ NVIC_Init(&NVIC_InitStructure); //¸ù¾ÝNVIC_InitStructÖÐÖ¸¶¨µÄ²ÎÊý³õʼ»¯ÍâÉèNVIC¼Ä´æÆ÷ DMA_ITConfig(DMA2_Stream0,DMA_IT_TC,ENABLE); //¿ªÆôDMA2_Stream0´«ÊäÍê³ÉÖжÏÔ´ //DMA2_Stream0->CR|= (1<<5);
Start a sample (there are better synchronization signal effect)
// DMA_Cmd(DMA2_Stream0, ENABLE); //¿ªÆôDMA´«Êä DMA2_Stream0->CR |= 1; // ADC_Cmd(ADC1, ENABLE);//¿ªÆôADת»»Æ÷ ADC1->CR2 |= 1;