notice: This article only as a reference experiment on the computer and requires supporting documents
Logisim learning ➕
Tunnel ➕
The equivalent of a local variable
Multiplexer -Bit-Selector➕
The (West edge) starting from the lowest bit input data, equally divided into n groups, n is determined by the output bit width;
The other input (South egde) decided to select the i-th group of data
Components used in the summary ➕
Wiring→Bit Extender,Constant,Tunnel,Probe
Gates→…
Plexers→Multiplexer,Decoder,Bit Selector
Arithmetic→Adder/Substractor*,Multiplier,Divider,Comparator,Shifter
Anchor
Construction of 32-bit arithmetic. Using a 32-bit adder packaged and logisim existing internet arithmetic unit (adder disable the system comes subtracter) constructing a 32-bit arithmetic, may support an arithmetic addition, subtraction, multiplication, division, logical AND, OR , nOT, XOR logical shift left, shift right logical, arithmetic shift right operation, common support program status flags (signed overflow OF, CF2 unsigned overflow, results are equal equal), operator functions, and input and output pins, see the following table, in the main circuit package their detailed test operator, advantages and disadvantages of the operator in the report.
8-bit serial controllable adder ➕
See textbook P69, the difference is that here there is cin
eg. X + YSub = 0 when, Cin is the carry
Sub = 1 when
When, Cin = 0, Sub xor Cin = 1, Y represents a complement operation on the
When, Cin = 1, Sub xor Cin = 0, Cin represents a borrow, thus Y-1, and the complement offset +1
CLA74182 lookahead circuit ➕
Serial adder carry bit into one of a large delay,
So you can think of ways to get ahead of the current position of the carry input
In Example 4, provided binary adder input bit i xi, yi, output si, CI is a carry input, a carry output Ci + 1
There recursive expansion
Here can be found at all levels of the carry and carry other unrelated
G *, P * and press the "File" is connected to a given prompt
G *, P * role ➕
To be mentioned below
CLA .. effect ➕
Part 1: produced by the above Gi, Pi, is input to the CLA, G *, P *
Part 2: Fast green into respective bits of a Gi, Pi, C0 Nengchan
Four fast adders ➕
This is relatively simple, if you draw a good CLA74182, G *, P * role still unclear
notice ➕
The above GP index starting at 1
Role ➕
Input Xi, Yi, C0
Produced by the above Gi, Pi, is input to the CLA, each capable of producing rapid raw bits and carry
To give Si, Ci, G *, P *
Output (required) (final output highlights)
The order of the results generated
Xi, Yi, C0
0
Gi, Pi (Xi, Yi)
1
G * P * (Gi, Pi), Ci (Gi, Pi, C0)
2
Si (Ci, Xi, Yi)
3
notice ➕
Here with the tunnel G1, G2, ...
16 fast adder ➕
Group carry ➕
Only the xi, yi lost to four fast adders can be obtained G *, P *, input CLA74182, to give each carry, reinfused four fast adders, to obtain Si
Output (required) (final output highlights)
The order of the results generated
Xi, Yi, C0
0
Gi *, P *
1
Ci (Gi * Pi *, C0), Gall * * PAll
2
Si (Ci, Xi, Yi)
3
32 fast adder ➕
With the 16-bit adder, but more than one overflow detection ↓
_ Overflow detection ➕
The first ➕
Adding two numbers X, Y are the same symbols, and the symbol S of the results of different
The second ➕
Whether carry the sign bit of the highest bit of the data is consistent, inconsistent indicates an overflow
E.g. -111 + (--110
Complement is 1001 + 1010
So overflow
Here it can be detected with a first overflow; can multiplexer -Bit-Selector isolated sign bit (simpler than Splitter)
ALU ➕
equal&&op=1011➕
logisim operator → comparator
Signed OverFlow ➕
Only we need to deal signed addition and subtraction
Unsigned Overflow ➕
And less than addend addition, subtraction difference is greater than the minuend
In particular: Addition: unsigned adder, a carry overflow i.e., an output cout 32-bit adder is this variable
alu operation ➕
Logisim → → multiplexer selector data multiplexer
0
Comes shifter
1
Comes shifter
2
Comes shifter
3
Comes multiplier
4
Comes divider
5
32-bit adder
6
32-bit adder
7
Own logic gates
8
Own logic gates
9
Own logic gates
10
Own logic gates
11
√
DETAILED circuit is not given
Other ➕
Test ^ arithmetic circuit ➕
☆ ALU onto the column from the left on the arithmetic test circuit, the test circuit is completed operator
---------------------
Author: migeater
Source: CNBLOGS
Original: https://www.cnblogs.com/migeater/p/9102195.html
Disclaimer: This article author original article, reproduced, please attach Bowen link!
Content analysis By: CSDN, CNBLOG blog articles reprinted a key plug