1. Upon completion of the operation x + 2y is in an 8-bit computer, the machine is assumed that the number of variables x and y is expressed as [x] = 44H fill with complement, the number of machines [y] Complement = DCH, then x + 2y is and the corresponding overflow flag oF are ().
B.32H、1
C.FCH、1
D.FCH、0
2. Upon completion of the x-2y in an 8-bit computer, the machine is assumed that the number of variables x and y is represented by the complement code [x] Complement = 44H, [y] Complement = DCH, the x-2y machine and the corresponding number of the overflow flag oF are ().
B.68H、1
C.8CH、1
D.8CH、0
3. Upon completion of the x / 2 + 2y in an 8-bit computer, the machine is assumed that the number of variables x and y is expressed with a complement to [x] Complement = 44H, [y] Complement = DCH, then x / 2 + 2y is machine number and the corresponding overflow flag oF are ().
B.DAH, 1
C.CAH, 0
D.DAH, 0
4. The number of machine variables r1 and r2 are assumed to represent 8-bit complement to [r1] up = F5H, [r2] Complement = EEH. If the calculation result is stored in an 8-bit register, then the following calculation is overflow occurs ().
B.r1 + r2
C.r1- r2
D.r1 × r2
5. assumed Integer instruction, subtraction instruction, and the integer clock cycles required to shift instructions (CPI) are both 1, an integer multiply instruction clock cycle is required 10. If x is an integer variable, in order to calculate the 64 * x with a minimum number of clock cycles, the compiler should be used to best instruction sequence ().
B. two shift instructions, and two add instructions
Article C.1 multiply instruction
Article D.1 left instructions
6. assumed Integer instruction, subtraction instruction, and the integer clock cycles required to shift instructions (CPI) are both 1, an integer multiply instruction clock cycle is required 10. If x is an integer variable, in order to calculate a minimum of 54 * x the number of clock cycles, the compiler should be used to best instruction sequence ().
B. two shift instructions, and two subtraction instructions
Article C.1 multiply instruction
D.4 bar and shift instructions add instruction 3
7. Integer instruction assumed, the desired logical operation instructions and clock cycles shift instruction (CPI) are 1, the integer division instruction 32 required clock cycle. If x is an integer variable, in order to calculate the minimum number of x / 64 clock cycle, instruction translator to be the best choice of sequence ().
Article B.1 addition instruction, a right shift instruction
Article C.1 right instruction
D. two right instruction, and an operation instruction, an add instruction
8. known float type variables represented by IEEE 754 single-precision floating point format, float type variables x and y is the number of machines are represented as x = 40E8 0000H, y = C204 0000H, then x + y is calculated, the first step results of the order of operation [Ex-Ey] to complement ().
B.0000 0111
C.1111 1011
D.0000 0011
9. For IEEE 754 single-precision floating-point addition and subtraction, an absolute value of the difference between the two phases obtained as long as the order of | [Delta] E | than (), there is no need to continue subsequent processing, this time, direct access to the calculation result Order that large numbers.
B.128
C.23
D.25
10. If float and double, respectively, using the IEEE 754 single-precision and double-precision floating-point format, sizeof (int) = 4, then for any int variables x, y and z, the following relational expression which is never true?
B.dx * that * dz dz == * that * dx
C. (dx + dy) dx + dz == + (you + dz)
D.dx / dx == dy / dy