Compare shadow registers, input capture and output.

1: shadow register:
This register indicates the physical register corresponding to two: one is that we can be written or read registers, called a pre-load register, we can not see the other, can not really read them write operation, but the use of that really works register called shadow registers.

2: Input Capture:
When a valid edge on ICx converted signal is detected, the current value of the counter is latched into the capture / compare register (TIMx_CCRx) continuously records the input transform can be calculated two cycles of the input signal.

3: Output Compare:
When the content of the counter capture / compare register and the output compare do the following:
● mode output of the comparator (OCxM TIMx_CCMRx bit register) and the output polarity (CCxP TIMx_CCER register bit) is defined the value is output to the corresponding pin. Compare match, the output pin can maintain its level (OCxM = 000), is provided to the active level (OCxM = 001), arranged to an inactive level (OCxM = 010) or inverted (OCxM = 011 ).

● set the interrupt flag (bit CCxIF TIMx_SR register) status register.

● If the corresponding interrupt mask is set (CCxIE is TIMx_DIER bit register), an interrupt is generated.

● If set corresponding enable bit (CCxDE TIMx_DIER bit register, CCDS bit register TIMx_CR2

Select DMA request function), a DMA request is generated.

OCxPE TIMx_CCMRx bits of register select whether TIMx_CCRx required preload register.

In output compare mode, the update event UEV has no effect on OCxREF and OCx output.

Synchronization accuracy can be achieved a down counter. Output compare mode (in the one-pulse mode) can also be used to output a

Single pulse.