Static random access memory SRAM data storage principle

RAM main role is to store code and data for the central processor to call when needed. For a memory such as RAM is still the same, although the memory is the code represents 0 and 1, but is different in different combinations of data. RAM memory for the data bus is used in terms of incoming data, or outgoing data. Since memory storage space is the same as defined by a predetermined rule book store shelves if the aforementioned, we can store the data by this rule to the corresponding position on the memory, to perform this positioning operation will depend on address bus to achieve.

The central processors, the RAM is like a long thin line lot of spaces, each space has a unique address corresponding thereto. If you want to call the central processor after the data from the RAM, it is first required to the address data of the address bus transmits the positioning data to be accessed, then wait a number of clock cycles, data bus, will transfer the data to the CPU. Here on SRAM diagram of storage principle can help us a good understanding of the process.



figure 1

  
The above cited example of FIG. 1 in the CPU accesses each row of data in only one byte of data, but in the real world are different, each typically require CPU 32bit or 64bit data call (which is different according to the bit width of the data bus of the computer system determined). If the data bus is 64 bytes, then, the CPU will access eight bytes of data (in a think time, if access to one or each byte of data, 64bit bus will not show up any advantage.)

in the figure above small dots represent memory space in RAM, each with a unique address line connected with it. When the address decoder receiving address data transmitted to the address bus, it is positioned according to the position data of the central data processor located want to call, and wherein the data bus data will be transmitted to the central processor.



figure 2


如果RAM对于CPU来说仅仅是一条“线”的话,还不能体现实际的运行情况。因为如果实际情况真的是如此的话,在实际制造芯片的时候,会有很多实际的困难,特别是在需要设计大容量的RAM的时候。所以一种更好的能够降低成本的方法是让存储信息的“空格”排列为很多行--每个“空格”对应一个bit存储的位置。如果要存储1024bits(2^10)数据,那么你只要使用32x32(2^5*2^5=2^10)的矩阵就能够达到这个目的了。很明显一个32x32的矩阵比一个1024bit的行设备更紧凑,实现起来也更加容易。请看图2.

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Origin www.cnblogs.com/sramsun/p/12341577.html