Make and Makefile basics | 1

Table of contents

1. What is Make

2. What is the function of Make?

3. How Make works

4. Advantages of Make

5. File naming convention read by Make

6. How Make reads Makefile

7. Basic structure of Makefile

8. Make executes clean in Makefile


What is makefile and what does it do?

Reply from CSND Creation Assistant:

A makefile is a file used to describe the dependencies and compilation order between code files in a project. It is a configuration file for automated tools used to build/compile software. The makefile tells the compiler how to compile and link the code so that the code can be successfully built into an executable file.

The main functions of makefile include:

  1. Make sure the source code is compiled correctly to produce the executable file.

  2. Automate the process of program compilation and building, thereby reducing manual human errors.

  3. Check source code files for dependencies and recompile files only if necessary.

  4. Make sure all files are compiled in the correct order to avoid compilation errors.

  5. You can easily modify the code. After any source file is changed, the makefile can automatically update the dependencies and only recompile the necessary files.

In short, makefile is an important tool for automated software construction. It can significantly improve software development efficiency, reduce error rates, and make the software development process more efficient, stable and reliable.

1. What is Make

Before understanding what make is, you need to understand the GNU tools:

1) Compilation tool: compile a source program into an executable program;

2) Debugging tools: capable of source code or assembly-level debugging of executable programs;

3) Software engineering tools: used to assist multi-person development or management of large-scale software projects, such as make , CVS, Subvision;

4) make: also known as the project manager, which is the automatic compilation manager;

5) Other tools: Linkers used to link multiple target files into executable files, or used as tools for format conversion.

2. What is the function of Make?

        Make function: The automatic compilation manager means - it can automatically discover updated files based on file timestamps and reduce the compilation workload.

3. How Make works

        Perform a large amount of compilation work by reading the contents of the Makefile file.

4. Advantages of Make

        When we modify a piece of code in compilers such as Keil 5 and ARM, we need to compile the entire project file and then test whether the modified code part takes effect. Assume that the amount of code is large and compilation takes a long time. Every slight change requires compiling the entire project, which will consume time.

        When we compile files in a Linux system, we generally use gcc to generate them. When there are a large number of project files, we need to execute multiple instructions for compilation, which is troublesome and time-consuming. But when we use make to read the Makefile, the compiler only compiles the changed code files instead of completely compiling all files, which is much more efficient. After using Make to read the Makefile file, the generated file is specified and completed in one step, which is fast and trouble-free.

       Key advantage: The compiler only compiles the changed code files instead of completely compiling all files.

5. File naming convention read by Make

        Generally speaking, it is in the same path as the .c file and named: Makefile (the first letter can also be lowercase).

6. How Make reads Makefile

        Under the current path, there is a file named Makefile (it can also be named makefile). You can directly enter make on the command line to read it.

        You can also add a relative path or an absolute path to read the Makefile.

7. Basic structure of Makefile

Makefile格式:
target :dependency_files
<TAB> command


For example, a file named Makefile is created with the following content (in the same path as the hello.c hello.h file):
hello.o: hello.c hello.h
  gcc -c hello.c -0 hello.o

(Command meaning: -c only compiles without linking, generates the target file .o file, -o outputs the .o file to that file)

Makefile format analysis

1) target: the name of the final generated executable file (what is generated)

2) dependency_files: generated by that or those files (generated by who)

3) <TAB>: There needs to be a Tab key distance before entering the command (format specification)

Example analysis

1) hello.o: The final generated file name is hello.o (what is generated)

2) hello.c hello.h (generated by who)

3) gcc -C hello.c -0 hello.o(<TAB> command)

4) The name of the generated file here is defined by yourself (here it is hello.o) and does not have to be consistent with the name of the file generated by whom (here it is hello.c hello.h), otherwise it will cause confusion, hereby explain

8. Make executes clean in Makefile

The content of the Makefile file is:

test:f1.o f2.o main.o
  gcc f1.o f2.o main.o -o test
f1.o:f1.c
  gcc -c f1.c -0 f1.o
f2.o:f2.c
  gcc -c f2.c -o f2.o
main.o:main.c
  gcc -c main.c -0 main.o
clean:
  rm *.o test

The function of the above Makefile file is: generate and output the generated content to: test file, and clear the intermediate file .o file generated by the compilation process.

1) Enter: make clean on the command line to delete the .o file.

2) When a directory named: clean appears in the current path, an error will appear in the make clean directory.

Solution:

Just add the content -.PHONY:clean to the Makefile. The complete file content is as follows:

test:f1.o f2.o main.o
  gcc f1.o f2.o main.o -o test
f1.o:f1.c
  gcc -c f1.c -0 f1.o
f2.o:f2.c
  gcc -c f2.c -o f2.o
main.o:main.c
  gcc -c main.c -0 main.o

.PHONY:clean

clean:
  rm *.o test

At this time, you can clean the .o file normally by executing make clean.

Let’s go here first, I’ll remember it next time.

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