Uboot基于renesas的emmc驱动分析

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文件位置:drivers/mmc/sh_sdhi.c

 

初始化函数:sh_sdhi_init

  1. 分配host数据结构体:sh_sdhi_host
  2. 创建并初始化mmc数据结构:mmc_create
  3. 初始化host结构体的channel、addr、quirks、bus_shift参数

 

mmc_create函数(mmc结构体初始化)

  1. 分配mmc空间
  2. 将mmc_config与sh_sdhi_host分别赋值给其(mmc)成员cfg和priv
  3. 初始化dsr成员
  4. 初始化block_dev成员,将mmc的read、write和erase函数进行赋值
  5. 加入mmc设备(mmc_devices)链表

 

sh_sdhi_host结构体

struct sh_sdhi_host {

unsigned long addr; //寄存器基地址

int ch; //dma通道?

int bus_shift; //位宽

unsigned long quirks; //

unsigned char wait_int; //

unsigned char sd_error; //

};

mmc_data结构体

struct mmc_data {

union {

char *dest; //目的地址

const char *src; /* src buffers don't get written to */

};

uint flags; //标志

uint blocks; //块数

uint blocksize; //块大小

};

 

mmc_config数据结构体

struct mmc_config {

const char *name; //名字

const struct mmc_ops *ops; //mmc提供的操作

uint host_caps; //位宽、速度等

uint voltages; //电压

uint f_min; //最低工作频率

uint f_max; //最高工作频率

uint b_max; //最大block数

unsigned char part_type;

};

mmc_ops数据结构体

struct mmc_ops {

int (*send_cmd)(struct mmc *mmc,

struct mmc_cmd *cmd, struct mmc_data *data); //发送命令

void (*set_ios)(struct mmc *mmc); //设置频率电压等

int (*init)(struct mmc *mmc); //初始化

int (*getcd)(struct mmc *mmc); //

int (*getwp)(struct mmc *mmc);

int (*card_busy)(struct mmc *mmc); //卡忙检测

};

mmc数据结构

struct mmc {

struct list_head link;

const struct mmc_config *cfg; /* provided configuration */

uint version;

void *priv; //指向host对象(sh_sdhi_host)

uint has_init;

int high_capacity;

uint bus_width;

uint clock;

uint card_caps;

uint ocr;

uint dsr;

uint dsr_imp;

uint scr[2];

uint csd[4];

uint cid[4];

ushort rca;

u8 part_support;

u8 part_attr;

u8 wr_rel_set;

u8 generic_cmd6_time;

char part_config;

char part_num;

uint tran_speed;

uint read_bl_len;

uint write_bl_len;

uint erase_grp_size; /* in 512-byte sectors */

uint hc_wp_grp_size; /* in 512-byte sectors */

u64 capacity;

u64 capacity_user;

u64 capacity_boot;

u64 capacity_rpmb;

u64 capacity_gp[4];

u64 enh_user_start;

u64 enh_user_size;

block_dev_desc_t block_dev;

char op_cond_pending; /* 1 if we are waiting on an op_cond command */

char init_in_progress; /* 1 if we have done mmc_start_init() */

char preinit; /* start init as early as possible */

int ddr_mode;

};

 

typedef struct block_dev_desc {

int if_type; /* type of the interface */

int dev; /* device number */

unsigned char part_type; /* partition type */

unsigned char target; /* target SCSI ID */

unsigned char lun; /* target LUN */

unsigned char type; /* device type */

unsigned char removable; /* removable device */

#ifdef CONFIG_LBA48

unsigned char lba48; /* device can use 48bit addr (ATA/ATAPI v7) */

#endif

lbaint_t lba; /* number of blocks */

unsigned long blksz; /* block size */

int log2blksz; /* for convenience: log2(blksz) */

char vendor [40+1]; /* IDE model, SCSI Vendor */

char product[20+1]; /* IDE Serial no, SCSI product */

char revision[8+1]; /* firmware revision */

unsigned long (*block_read)(int dev,

      lbaint_t start,

      lbaint_t blkcnt,

      void *buffer);

unsigned long (*block_write)(int dev,

       lbaint_t start,

       lbaint_t blkcnt,

       const void *buffer);

unsigned long   (*block_erase)(int dev,

       lbaint_t start,

       lbaint_t blkcnt);

void *priv; /* driver private struct pointer */

}block_dev_desc_t;

 

sh_sdhi_send_cmd函数调用sh_sdhi_start_cmd发送命令

sh_sdhi_start_cmd函数(sh_sdhi_ops.send_cmd)

  1. 对CMD12(停止)的处理(写STOP寄存器、等中断处理完成、获取response),return
  2. 根据操作模式准备命令(多块处理、blksize blkcount等)
  3. 操作SDHI_INFO1寄存器及SDHI_ARG0、SDHI_ARG1(没手册,不清楚这步作用)
  4. 等待sd_bus空闲
  5. 清相关标志位,然后向命令寄存器(SDHI_CMD)写命令
  6. 轮询中断标志,并处理
  7. 错误处理
  8. 确认已回复
  9. 数据传输:sh_sdhi_data_trans

sh_sdhi_intr函数

  1. 读取SDHI_INFO1和SDHI_INFO2状态寄存器值分别赋值给state1和state2
  2. 根据state1判断card的插入、移除、Respons End和Access End,进行相应处理
  3. 根据state2判断error、read enable、write enable,进行相应处理

sh_sdhi_get_response函数

如果是MMC_RSP_136类型,则需要读取SDHI_RSP00~SDHI_RSP07,否则只需读取SDHI_RSP00~SDHI_RSP01来进行移位拼接处理

 

sh_sdhi_data_trans函数

根据命令类型,分别进行多块读、多块写、单块读、单块写操作。具体处理函数略。

sh_sdhi_set_ios函数(sh_sdhi_ops.set_ios)

  1. 调用sh_sdhi_clock_control函数设置时钟
  2. 设置总线宽度(8bit)

 

sh_sdhi_clock_control函数

  1. 通过读取SDHI_INFO2寄存器的(1<<14),确认不处于busy状态
  2. Disable时钟
  3. 计算分频
  4. 设置时钟
  5. 等待完成

sh_sdhi_initialize函数(sh_sdhi_ops.init)

  1. 调用sh_sdhi_sync_reset函数执行reset操作
  2. 设置port(没手册,看不懂)
  3. 使能info1的response、access_end等属性(没手册,看不懂)

 

sh_sdhi_card_busy函数(sh_sdhi_ops.card_busy)

读取SDHI_INFO2寄存器的INFO2_SDDAT0位(1<<7)获取信息

 

寄存器介绍

#define SDHI_CMD (0x0000 >> 1) //命令寄存器(0x00)

#define SDHI_PORTSEL (0x0004 >> 1) //port选择寄存器(0x2)

#define SDHI_ARG0 (0x0008 >> 1) //参数0(0x04)

#define SDHI_ARG1 (0x000C >> 1) //参数1(0x06)

#define SDHI_STOP (0x0010 >> 1) //停止寄存器(0x08)

#define SDHI_SECCNT (0x0014 >> 1) //块数寄存器(0x0a)

#define SDHI_RSP00 (0x0018 >> 1) //response0(0x0c)

#define SDHI_RSP01 (0x001C >> 1)//response1(0x0e)

#define SDHI_RSP02 (0x0020 >> 1)//response2(0x10)

#define SDHI_RSP03 (0x0024 >> 1)//response3(0x12)

#define SDHI_RSP04 (0x0028 >> 1)//response4(0x14)

#define SDHI_RSP05 (0x002C >> 1)//response5(0x16)

#define SDHI_RSP06 (0x0030 >> 1)//response6(0x18)

#define SDHI_RSP07 (0x0034 >> 1)//response7(0x1a)

#define SDHI_INFO1 (0x0038 >> 1)//info1(0x1c)

#define SDHI_INFO2 (0x003C >> 1)//info2(0x1e)

#define SDHI_INFO1_MASK (0x0040 >> 1)//mask1(0x20)

#define SDHI_INFO2_MASK (0x0044 >> 1)//mask2(0x22)

#define SDHI_CLK_CTRL (0x0048 >> 1)//时钟控制(0x24)

#define SDHI_SIZE (0x004C >> 1)//传输长度(0x26)

#define SDHI_OPTION (0x0050 >> 1)//card option(0x28)

#define SDHI_ERR_STS1 (0x0058 >> 1)//error state1(0x2c)

#define SDHI_ERR_STS2 (0x005C >> 1)//error state2(0x2e)

#define SDHI_BUF0 (0x0060 >> 1)//data port /buffer0(0x30)

#define SDHI_SDIO_MODE (0x0068 >> 1)//SDIO模式(0x34)

#define SDHI_SDIO_INFO1 (0x006C >> 1)//SDIO status info1(0x36)

#define SDHI_SDIO_INFO1_MASK (0x0070 >> 1)//SDIO irq mask1(0x38)

#define SDHI_CC_EXT_MODE (0x01B0 >> 1)// dma enable?(0xd8)

#define SDHI_SOFT_RST (0x01C0 >> 1)//软重启(0xe0)

#define SDHI_VERSION (0x01C4 >> 1)//版本号(0xe2)

#define SDHI_HOST_MODE (0x01C8 >> 1)//host模式(0xe4)

#define SDHI_SDIF_MODE (0x01CC >> 1)//SDIF模式(0xe6)

#define SDHI_EXT_SWAP (0x01E0 >> 1)// (0xf0)

#define SDHI_SD_DMACR (0x0324 >> 1)//DMA控制器?(0x192)

 

//以下寄存器为linux相对uboot增量

---------------------------------------------------------------------------------------------------------------------

#define CTL_SDIO_REGS 0x100

#define CTL_CLK_AND_WAIT_CTL 0x138

#define CTL_RESET_SDIO 0x1e0

#define DM_CM_SEQ_REGSET 0x800

#define DM_CM_SEQ_MODE 0x808

#define DM_CM_SEQ_CTRL 0x810

#define DM_CM_DTRAN_MODE 0x820

#define DM_CM_DTRAN_CTRL 0x828

#define DM_CM_RST 0x830

#define DM_CM_INFO1 0x840

#define DM_CM_INFO1_MASK 0x848

#define DM_CM_INFO2 0x850

#define DM_CM_INFO2_MASK 0x858

#define DM_CM_TUNING_STAT 0x860

#define DM_CM_SEQ_STAT 0x868

#define DM_DTRAN_ADDR 0x880

#define DM_SEQ_CMD 0x8a0

#define DM_SEQ_ARG 0x8a8

#define DM_SEQ_SIZE 0x8b0

#define DM_SEQ_SECCNT 0x8b8

#define DM_SEQ_RSP 0x8c0

#define DM_SEQ_RSP_CHK 0x8c8

#define DM_SEQ_ADDR 0x8d0

---------------------------------------------------------------------------------------------------------------------

 

CMD寄存器取值说明

#define CMD_MASK 0x0000ffff //低16位有效

#define SDHI_APP 0x0040

#define SDHI_MMC_SEND_OP_COND 0x0701

#define SDHI_SD_APP_SEND_SCR 0x0073

#define SDHI_SD_SWITCH 0x1C06

#define SDHI_MMC_SEND_EXT_CSD 0x1C08

 

PORT选择寄存器

#define USE_1PORT (1 << 8) /* 1 port */

 

ARG寄存器

#define ARG0_MASK 0x0000ffff

#define ARG1_MASK 0x0000ffff

STOP寄存器

#define STOP_SEC_ENABLE (1 << 8)

INFO1寄存器(事件/中断)

#define INFO1_RESP_END (1 << 0)

#define INFO1_ACCESS_END (1 << 2)

#define INFO1_CARD_RE (1 << 3)

#define INFO1_CARD_IN (1 << 4)

#define INFO1_ISD0CD (1 << 5)

#define INFO1_WRITE_PRO (1 << 7)

#define INFO1_DATA3_CARD_RE (1 << 8)

#define INFO1_DATA3_CARD_IN (1 << 9)

#define INFO1_DATA3 (1 << 10)

INFO1_MASK寄存器

#define INFO1M_RESP_END (1 << 0)

#define INFO1M_ACCESS_END (1 << 2)

#define INFO1M_CARD_RE (1 << 3)

#define INFO1M_CARD_IN (1 << 4)

#define INFO1M_DATA3_CARD_RE (1 << 8)

#define INFO1M_DATA3_CARD_IN (1 << 9)

#define INFO1M_ALL (0xffff)

#define INFO1M_SET (INFO1M_RESP_END | \

INFO1M_ACCESS_END | \

INFO1M_DATA3_CARD_RE | \

INFO1M_DATA3_CARD_IN)

INFO2寄存器(error状态)

#define INFO2_CMD_ERROR (1 << 0)

#define INFO2_CRC_ERROR (1 << 1)

#define INFO2_END_ERROR (1 << 2)

#define INFO2_TIMEOUT (1 << 3)

#define INFO2_BUF_ILL_WRITE (1 << 4)

#define INFO2_BUF_ILL_READ (1 << 5)

#define INFO2_RESP_TIMEOUT (1 << 6)

#define INFO2_SDDAT0 (1 << 7)

#define INFO2_BRE_ENABLE (1 << 8)

#define INFO2_BWE_ENABLE (1 << 9)

#define INFO2_CBUSY (1 << 14)

#define INFO2_ILA (1 << 15)

#define INFO2_ALL_ERR (0x807f)

 

 

INFO2_MASK寄存器

#define INFO2M_CMD_ERROR (1 << 0)

#define INFO2M_CRC_ERROR (1 << 1)

#define INFO2M_END_ERROR (1 << 2)

#define INFO2M_TIMEOUT (1 << 3)

#define INFO2M_BUF_ILL_WRITE (1 << 4)

#define INFO2M_BUF_ILL_READ (1 << 5)

#define INFO2M_RESP_TIMEOUT (1 << 6)

#define INFO2M_BRE_ENABLE (1 << 8)

#define INFO2M_BWE_ENABLE (1 << 9)

#define INFO2M_ILA (1 << 15)

#define INFO2M_ALL (0xffff)

#define INFO2M_ALL_ERR (0x807f)

 

//linux对info1和info2的位描述

---------------------------------------------------------------------------------------------------------------------

/* Definitions for values the CTRL_STATUS register can take. */

#define TMIO_STAT_CMDRESPEND     BIT(0)

#define TMIO_STAT_DATAEND        BIT(2)

#define TMIO_STAT_CARD_REMOVE   BIT(3)

#define TMIO_STAT_CARD_INSERT    BIT(4)

#define TMIO_STAT_SIGSTATE       BIT(5)

#define TMIO_STAT_WRPROTECT      BIT(7)

#define TMIO_STAT_CARD_REMOVE_A BIT(8)

#define TMIO_STAT_CARD_INSERT_A BIT(9)

#define TMIO_STAT_SIGSTATE_A     BIT(10)

 

/* These belong technically to CTRL_STATUS2, but the driver merges them */

#define TMIO_STAT_CMD_IDX_ERR    BIT(16)

#define TMIO_STAT_CRCFAIL        BIT(17)

#define TMIO_STAT_STOPBIT_ERR    BIT(18)

#define TMIO_STAT_DATATIMEOUT    BIT(19)

#define TMIO_STAT_RXOVERFLOW    BIT(20)

#define TMIO_STAT_TXUNDERRUN    BIT(21)

#define TMIO_STAT_CMDTIMEOUT     BIT(22)

#define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */

#define TMIO_STAT_RXRDY          BIT(24)

#define TMIO_STAT_TXRQ           BIT(25)

#define TMIO_STAT_ILL_FUNC   BIT(29)/* only when !TMIO_MMC_HAS_IDLE_WAIT */

#define TMIO_STAT_SCLKDIVEN  BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */

#define TMIO_STAT_CMD_BUSY       BIT(30)

#define TMIO_STAT_ILL_ACCESS     BIT(31)

 

/* Define some IRQ masks */

/* This is the mask used at reset by the chip */

#define TMIO_MASK_INIT         0x8b7f031d /* H/W initial value */

#define TMIO_MASK_ALL         0x837f031d

#define TMIO_MASK_READOP   (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \

TMIO_STAT_DATATIMEOUT)

#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND | \

TMIO_STAT_DATATIMEOUT)

#define TMIO_MASK_CMD   (TMIO_STAT_CMDRESPEND |\ TMIO_STAT_CMDTIMEOUT | \

TMIO_STAT_CARD_REMOVE |\ TMIO_STAT_CARD_INSERT)

#define TMIO_MASK_DMA (TMIO_STAT_DATAEND | TMIO_STAT_DATATIMEOUT)

#define TMIO_MASK_IRQ   (TMIO_MASK_READOP | TMIO_MASK_WRITEOP |

TMIO_MASK_CMD)

---------------------------------------------------------------------------------------------------------------------

时钟控制寄存器

#define CLK_ENABLE (1 << 8)

 

OPTION寄存器

#define OPT_BUS_WIDTH_M (5 << 13) /* 101b (15-13bit) */

#define OPT_BUS_WIDTH_1 (4 << 13) /* bus width = 1 bit */

#define OPT_BUS_WIDTH_4 (0 << 13) /* bus width = 4 bit */

#define OPT_BUS_WIDTH_8 (1 << 13) /* bus width = 8 bit */

 

ERR_STS1寄存器(error detail1)

#define ERR_STS1_CRC_ERROR ((1 << 11) | (1 << 10) | (1 << 9) | (1 << 8) | (1 << 5))

#define ERR_STS1_CMD_ERROR ((1 << 4) | (1 << 3) | (1 << 2) | (1 << 1) | (1 << 0))

 

ERR_STS2寄存器(error detail2)

#define ERR_STS2_RES_TIMEOUT (1 << 0)

#define ERR_STS2_RES_STOP_TIMEOUT ((1 << 0) | (1 << 1))

#define ERR_STS2_SYS_ERROR ((1 << 6) | (1 << 5) | (1 << 4) | \

(1 << 3) | (1 << 2) | (1 << 1) | \

(1 << 0))

 

SDIO_MODE寄存器

#define SDIO_MODE_ON (1 << 0)

#define SDIO_MODE_OFF (0 << 0)

 

SDIO_INFO1寄存器

#define SDIO_INFO1_IOIRQ (1 << 0)

#define SDIO_INFO1_EXPUB52 (1 << 14)

#define SDIO_INFO1_EXWT (1 << 15)

 

SDIO_INFO1_MASK寄存器

#define SDIO_INFO1M_CLEAR ((1 << 1) | (1 << 2))

#define SDIO_INFO1M_ON ((1 << 15) | (1 << 14) | (1 << 2) | (1 << 1) | (1 << 0))

 

EXT_SWAP寄存器

#define SET_SWAP ((1 << 6) | (1 << 7)) /* SWAP */

 

软复位寄存器

#define SOFT_RST_ON (0 << 0)

#define SOFT_RST_OFF (1 << 0)

 

分频系数

#define CLKDEV_SD_DATA 25000000 /* 25 MHz */

#define CLKDEV_HS_DATA 50000000 /* 50 MHz */

#define CLKDEV_MMC_DATA 20000000 /* 20MHz */

#define CLKDEV_UHSI_DATA 200000000 /* 200MHz */

#define CLKDEV_INIT 400000 /* 100 - 400 KHz */

 

quirk

#define SH_SDHI_QUIRK_16BIT_BUF (1 << 0)

#define SH_SDHI_QUIRK_64BIT_BUF (1 << 1)

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