vivado basics

1.zynq development board design and construction respected

Respected design philosophy is to design the intellectual property of reusable IP blocks.

 

 

 

 

 

 

 

 

 

 

 

2. The problem encountered during the operation and solutions

(1) Integrated slow Solution:

We all know Vivado compiler is pretty slow, every time together I picked up the phone, this method can increase compilation speed, the number of threads supported by a compile-time run in VIVADO in the following table when :( integrated generally 2 threads)

	Place	Route
Windows default	2	2
Linux default	4	4
Windows open maxThreads = 8	4	4
linux open maxThreads = 8	8	8

 A: Enter the following command at tcl script:

　　Set multi-threaded command: set_param general.maxThreads 4

　　Read the current number of threads of command: to get_param general.maxThreads

B: incremental compilation design:

　　1, first non-incremental compilation is completed, the obtained reference dcp layout file;

　　2, when the logic modification is less than 5%, to be re-publication of this, incremental compilation

　　3, step by step open: implementation setting - options - incremental compile, browse files

　　4, select .runs / impl_1 / * .dcp

　　5, click on the run implementation, waiting for the results

Effect: expected to decrease about 30% of the time.

(2) pin specified constraints xdc file written grammar requirements

Reference Site

https://blog.csdn.net/angelbosj/article/details/52921563

http://xilinx.eetrend.com/article/8441

https://blog.csdn.net/feiliantong/article/details/78011665

(3) Use dcp file: http: //blog.chinaaet.com/luozhongpin1989/p/37153

3. Operation of the process

http://www.docin.com/p-1856047260.html

以一个工程为例，按照如下步骤开发关于block design

     #1.create block design,产生一个空白的工程模板

     #2.导入IP核，包括一些经常用到的核，如zynq-processing-system，axi-dma，conact，axi-fifo-data，以及我们需要的所有的自己编写的HLS的IP核

     #3.选择auto-connect对模块进行连接，但是这个过程并不会把所有的模块都接好，所以还需要进一步的手动连接（需要注意的是对于axi相关的连线，能一根直接连接完毕就不要用多根自己连接，会导致编译错误）

     #4.进行validate design————generate block design（相当于产生一个完整的工程）————create wrapper（将工程包装起来，右击source的system选择create HDL wrapper即可）

     #5.执行综合和implementation（该过程费时间较长，可以先略过去）然后generate bitstream

     #6.file--export hardware 然后launch SDK，打开SDK进行软件部分的设置

     #7.软件部分的实现过程直接导入main.c等相关的文件，file ---refresh后，保存就会自动编译

     #8.编译成功后，右击system_wrapper_hw_platform_0，在弹出来的对话框中选择run as ---run configurations，然后选择对应的bitstream文件，接下来就可以将文件下载到开发板，进行工程的执行。